FirDesign
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：3250KB
下载次数：5
上传日期：2020-02-19 18:51:29
上 传 者：
无线电之家99
说明： FIR滤波器的FPGA实现，基于MATLAB和Quartus平台，使用Verilog和IP core设计，有详细的说明操作文档，并附上结果图，验证可行，欢迎学习
(FPGA implementation of FIR filter, based on MATLAB and quartus platform, using Verilog and IP core design, with detailed operation documents, and attached with the result chart, verified feasible, welcome to learn)
文件列表:
FirDesign\FirIPCore\db\add_sub_24e.tdf (1916, 2018-05-07)
FirDesign\FirIPCore\db\altsyncram_osf1.tdf (19940, 2018-05-07)
FirDesign\FirIPCore\db\altsyncram_rk31.tdf (16754, 2018-05-07)
FirDesign\FirIPCore\db\altsyncram_sd81.tdf (65770, 2018-05-07)
FirDesign\FirIPCore\db\a_dpfifo_3s81.tdf (5989, 2018-05-07)
FirDesign\FirIPCore\db\cmpr_gs8.tdf (1884, 2018-05-07)
FirDesign\FirIPCore\db\cmpr_ogc.tdf (1822, 2018-05-07)
FirDesign\FirIPCore\db\cntr_4pf.tdf (2801, 2018-05-07)
FirDesign\FirIPCore\db\cntr_6pf.tdf (3323, 2018-05-07)
FirDesign\FirIPCore\db\cntr_ao7.tdf (3033, 2018-05-07)
FirDesign\FirIPCore\db\cntr_tnb.tdf (2922, 2018-05-07)
FirDesign\FirIPCore\db\cntr_unb.tdf (3055, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(0).cnf.cdb (2525, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(0).cnf.hdb (1197, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(1).cnf.cdb (1897, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(1).cnf.hdb (1150, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(10).cnf.cdb (2296, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(10).cnf.hdb (873, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(11).cnf.cdb (2632, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(11).cnf.hdb (931, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(12).cnf.cdb (2590, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(12).cnf.hdb (917, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(13).cnf.cdb (9898, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(13).cnf.hdb (3043, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(14).cnf.cdb (2046, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(14).cnf.hdb (1174, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(15).cnf.cdb (13085, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(15).cnf.hdb (4835, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(16).cnf.cdb (2232, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(16).cnf.hdb (1042, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(17).cnf.cdb (1875, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(17).cnf.hdb (880, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(18).cnf.cdb (3533, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(18).cnf.hdb (1398, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(19).cnf.cdb (3148, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(19).cnf.hdb (1278, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(2).cnf.cdb (4310, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(2).cnf.hdb (2160, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(20).cnf.cdb (2203, 2018-05-07)
FirDesign\FirIPCore\db\FirIPCore.(20).cnf.hdb (989, 2018-05-07)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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