ov5640_vga_demo
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：28221KB
下载次数：9
上传日期：2020-03-16 10:04:26
上 传 者：
icaoxun
说明： 本程序完成OV5640摄像头的视频采集，并通过DDR3芯片缓存视频数据，然后将视频图像传输到PC端的VGA进行显示。视频格式：720P
(This program completes the video collection of the OV5640 camera, buffers the video data through the DDR3 chip, and then transmits the video image to the PC's VGA for display. Video format: 720P)
文件列表:
ov5640_vga_demo\doc\22.jpg (2103729, 2018-09-12)
ov5640_vga_demo\doc\ADV7123.pdf (298797, 2018-08-30)
ov5640_vga_demo\doc\compression mode 3 timing.PNG (41924, 2018-09-12)
ov5640_vga_demo\doc\DVP timing.PNG (108810, 2018-08-31)
ov5640_vga_demo\doc\IMG_20180907_155152.jpg (2103729, 2018-09-12)
ov5640_vga_demo\doc\ov5640 datasheet阅读.txt (1986, 2018-08-30)
ov5640_vga_demo\doc\OV5640_datasheet.pdf (2272692, 2018-08-29)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon.asy (193, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon.constraints\chipscope_icon.ucf (375, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon.constraints\chipscope_icon.xdc (793, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon.gise (1282, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon.ncf (375, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon.ngc (31992, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon.ucf (375, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon.v (892, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon.veo (1083, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon.xco (1667, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon.xdc (793, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon_flist.txt (421, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_icon_xmdf.tcl (3321, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.asy (353, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.cdc (14677, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.constraints\chipscope_ila.ucf (440, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.constraints\chipscope_ila.xdc (477, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.gise (1279, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.ncf (384, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.ngc (1011345, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.ucf (440, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.v (946, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.veo (1139, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.xco (4393, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila.xdc (477, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila_flist.txt (442, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\chipscope_ila_xmdf.tcl (3301, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\coregen.cgc (63878, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\coregen.cgp (522, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\eeprom.cpj (142113, 2015-11-04)
ov5640_vga_demo\doc\ov5640_vga_ddr_ctr\345\08_eeprom_test\eeprom_test.bgn (18725, 2016-03-27)
... ...
The following files were generated for 'icon_pro' in directory
E:\Others\Alinx\XC6SLX16\FPGA_CODE\ov5***0_vga_demo\proj\ov5***0_vga_ctr\_ngo\cs_icon_pro\
XCO file generator:
Generate an XCO file for compatibility with legacy flows.
* icon_pro.xco
Creates an implementation netlist:
Creates an implementation netlist for the IP.
* icon_pro.ngc
* icon_pro.ucf
* icon_pro.vhd
* icon_pro.vho
Creates an HDL instantiation template:
Creates an HDL instantiation template for the IP.
* icon_pro.vho
Generate ISE metadata:
Create a metadata file for use when including this core in ISE designs
* icon_pro_xmdf.tcl
Generate ISE subproject:
Create an ISE subproject for use when including this core in ISE designs
* icon_pro.gise
* icon_pro.xise
Deliver Readme:
Readme file for the IP.
* icon_pro_readme.txt
Generate FLIST file:
Text file listing all of the output files produced when a customized core was
generated in the CORE Generator.
* icon_pro_flist.txt
Please see the Xilinx CORE Generator online help for further details on
generated files and how to use them.
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