说明：  用verilog编写的OV5640摄像头DVP接口视频采集程序，经过调试的，可以直接拷贝。已在Xilinx Spartan6 FPGA调试验证。
(The OV5640 camera DVP interface video acquisition program written in verilog can be copied directly after debugging. Tested and verified on Xilinx Spartan6 FPGA.)