文件列表:

ethernet_mii_udp_1\123456_iprx.cdc (5676, 2015-07-26)
ethernet_mii_udp_1\123456_mac_tx.cdc (7867, 2015-08-02)
ethernet_mii_udp_1\123456_rgmii_tx.cdc (3004, 2015-07-31)
ethernet_mii_udp_1\arp_2.v (6606, 2014-09-04)
ethernet_mii_udp_1\chipscope.cdc (7134, 2015-01-20)
ethernet_mii_udp_1\chipscope_icon.asy (193, 2015-01-21)
ethernet_mii_udp_1\chipscope_icon.constraints\chipscope_icon.ucf (375, 2015-01-21)
ethernet_mii_udp_1\chipscope_icon.constraints\chipscope_icon.xdc (793, 2015-01-21)
ethernet_mii_udp_1\chipscope_icon.gise (1282, 2015-01-21)
ethernet_mii_udp_1\chipscope_icon.ncf (375, 2015-01-21)
ethernet_mii_udp_1\chipscope_icon.ngc (31988, 2015-04-20)
ethernet_mii_udp_1\chipscope_icon.ucf (375, 2015-01-21)
ethernet_mii_udp_1\chipscope_icon.v (892, 2015-04-20)
ethernet_mii_udp_1\chipscope_icon.veo (1083, 2015-01-21)
ethernet_mii_udp_1\chipscope_icon.xco (1667, 2015-01-21)
ethernet_mii_udp_1\chipscope_icon.xdc (793, 2015-01-21)
ethernet_mii_udp_1\chipscope_icon_flist.txt (421, 2015-01-21)
ethernet_mii_udp_1\chipscope_icon_xmdf.tcl (3321, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila.asy (353, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila.cdc (14677, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila.constraints\chipscope_ila.ucf (440, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila.constraints\chipscope_ila.xdc (477, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila.gise (1279, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila.ncf (384, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila.ucf (440, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila.v (946, 2015-04-20)
ethernet_mii_udp_1\chipscope_ila.veo (1139, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila.xco (4393, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila.xdc (477, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila_flist.txt (442, 2015-01-21)
ethernet_mii_udp_1\chipscope_ila_xmdf.tcl (3301, 2015-01-21)
ethernet_mii_udp_1\coregen.cgc (63878, 2015-01-21)
ethernet_mii_udp_1\coregen.cgp (522, 2015-01-21)
ethernet_mii_udp_1\CRC32_D8_AAL5.v (2036, 2015-07-18)
ethernet_mii_udp_1\ethernet.bgn (8863, 2014-06-20)
ethernet_mii_udp_1\ethernet.bld (4055, 2014-06-20)
ethernet_mii_udp_1\ethernet.cfi (431, 2013-12-16)
ethernet_mii_udp_1\ethernet.cmd_log (123080, 2014-06-20)
... ...

The following files were generated for 'chipscope_ila' in directory E:\Project\AX516\verilog\ethernet_test\ XCO file generator: Generate an XCO file for compatibility with legacy flows. * chipscope_ila.xco Creates an implementation netlist: Creates an implementation netlist for the IP. * chipscope_ila.cdc * chipscope_ila.constraints/chipscope_ila.ucf * chipscope_ila.constraints/chipscope_ila.xdc * chipscope_ila.ncf * chipscope_ila.ngc * chipscope_ila.ucf * chipscope_ila.v * chipscope_ila.veo * chipscope_ila.xdc * chipscope_ila_xmdf.tcl IP Symbol Generator: Generate an IP symbol based on the current project options'. * chipscope_ila.asy Generate ISE subproject: Create an ISE subproject for use when including this core in ISE designs * _xmsgs/pn_parser.xmsgs * chipscope_ila.gise * chipscope_ila.xise Deliver Readme: Readme file for the IP. * chipscope_ila_readme.txt Generate FLIST file: Text file listing all of the output files produced when a customized core was generated in the CORE Generator. * chipscope_ila_flist.txt Please see the Xilinx CORE Generator online help for further details on generated files and how to use them.

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