8.10
所属分类：其他
开发工具：matlab
文件大小：18KB
下载次数：52
上传日期：2006-03-23 16:34:41
上 传 者：
taoyuhui
说明： 强烈推荐下载,verilog状态机实例.可以在modelsim下运行.
(strongly recommend downloading Verilog state machine example. In modelsim running.)
文件列表:
8.10\work\_info (659, 2006-02-28)
8.10\work\dflop\_primary.vhd (258, 2006-02-28)
8.10\work\dflop\verilog.asm (3334, 2006-02-28)
8.10\work\dflop\_primary.dat (215, 2006-02-28)
8.10\work\dflop (0, 2006-02-27)
8.10\work\shifter\_primary.vhd (281, 2006-02-28)
8.10\work\shifter\verilog.asm (3209, 2006-02-28)
8.10\work\shifter\_primary.dat (349, 2006-02-28)
8.10\work\shifter (0, 2006-02-27)
8.10\work\test\_primary.vhd (68, 2006-02-28)
8.10\work\test\verilog.asm (4741, 2006-02-28)
8.10\work\test\_primary.dat (448, 2006-02-28)
8.10\work\test (0, 2006-02-27)
8.10\work (0, 2006-02-27)
8.10\vsim.wlf (40960, 2006-02-28)
8.10\dflop.cr.mti (500, 2006-02-28)
8.10\dflop.mpf (24538, 2006-02-28)
8.10\dflop.v (437, 2006-02-27)
8.10\dflop.v.bak (2, 2006-02-27)
8.10\test.v (474, 2006-02-28)
8.10\test.v.bak (473, 2006-02-28)
8.10 (0, 2006-02-27)
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