说明：  FPGA(现场可编程门阵列)与 CPLD(复杂可编程逻辑器件)都是可编程逻辑器件，它们是在PAL,GAL等逻辑器件的基础之上发展起来的。同以往的PAL,GAL等相比较，FPGA／CPLD的规模比较大，它可以替代几十甚至几千块通用IC芯片。这样的FPGA／CPLD实际上就是一个子系统部件。 本次EDA课程设计就是利用VerilogHDL来设计设计一个2选1多路选择器
(FPGA (field programmable gate array) and CPLD (complex programmable logic device) are programmable logic devices. They are developed on the basis of pal, gal and other logic devices. Compared with pal and gal, FPGA / CPLD has a large scale and can replace dozens or even thousands of general IC chips. Such FPGA / CPLD is actually a subsystem component. This EDA course design is to use Verilog HDL to design a 2-out-of-1 multiplexer)