ad5308
所属分类：串口编程
开发工具：Verilog
文件大小：7628KB
下载次数：5
上传日期：2020-05-22 09:37:13
上 传 者：
周杰伦x
说明： 控制8通道dac，ad5308的spi通信，和波形控制
(Control 8-channel DAC, ad5308)
文件列表:
ad5308 (0, 2020-05-06)
ad5308\ad5308 (0, 2020-05-19)
ad5308\ad5308\.cxl.ip (0, 2020-05-06)
ad5308\ad5308\.cxl.ip\incl (0, 2020-05-06)
ad5308\ad5308\.cxl.ip\incl\adv_vphy_defs.v (43521, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\av_pat_gen_v1_0_1_defs.v (2449, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axi4mm_axi_bridge.vh (5910, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axidma_fifo.vh (37804, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_ila_pp_v1_0_0_probe_ports_in.vh (29074, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_ila_pp_v1_0_0_probe_ports_out.vh (31634, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_ila_pp_v1_0_0_probe_width.vh (27392, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_infrastructure_v1_1_0.vh (12211, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_interconnect_v1_1_18.vh (12175, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_itct_v1_0_0_axis_itct_ports.vh (1028216, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_itct_v1_0_0_mu_inst.vh (111341, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_mem_v1_0_0_lib_fn.vh (3438, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_mem_v1_0_0_mu_inst.vh (2765100, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_mem_v1_0_0_probe_ports.vh (29074, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_mem_v1_0_0_probe_width.vh (27392, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_mem_v1_0_0_ver.vh (3269, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_mu_v1_0_0_mu_pkg.vh (2368, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_test_sequence_lib.sv (25909, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_trans_pkt.sv (27141, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_user_defined_csv_parser.sv (54723, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_user_defined_pattern_test.sv (50184, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_vio_v1_0_0_in.vh (14435, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_vio_v1_0_0_lib_function.vh (421, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_vio_v1_0_0_lparam.vh (117610, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_vio_v1_0_0_out.vh (14689, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axis_vio_v1_0_0_params.vh (54502, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axi_common_define.vh (12063, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axi_data_integrity_checker_nmu.sv (28093, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axi_data_integrity_checker_nsu.sv (26796, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axi_infrastructure_header.vh (8325, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axi_infrastructure_v1_1_0.vh (8325, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axi_stream_define.vh (4984, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axi_test_sequence_lib.sv (196359, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axi_tg_common_methods.svh (40872, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axi_tg_enums.svh (1964, 2019-11-07)
ad5308\ad5308\.cxl.ip\incl\axi_traffic_gen_v2_0_21_defines.v (10561, 2019-11-07)
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The files in this directory structure are automatically generated and managed by Vivado. Editing these files is not recommended.
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