OFDM_retiming
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：170KB
下载次数：57
上传日期：2011-07-07 20:16:44
上 传 者：
alen ye
说明： 基于Verilog的OFDM时钟恢复模块，在做全数字OFDM的时候是关键模块，可以在FPGA上实现。
(Verilog-OFDM-based clock recovery module, doing all-digital OFDM time is the key module can be implemented on the FPGA.
)
文件列表:
OFDM_retiming (0, 2008-07-10)
OFDM_retiming\Correlating_and_Accumulating.v (12134, 2008-07-10)
OFDM_retiming\Magnitude_Simplified_Computing.v (2763, 2008-07-10)
OFDM_retiming\Match_Filtering.v (1282, 2008-07-10)
OFDM_retiming\Peak_Finding.v (1449, 2008-07-10)
OFDM_retiming\Quantization.v (3128, 2008-07-10)
OFDM_retiming\Simple_Correlation.v (3086, 2008-07-10)
OFDM_retiming\Symbol_Output.v (4443, 2008-07-10)
OFDM_retiming\Time_Syncronization.v (1647, 2008-07-10)
OFDM_retiming\Time_Syncronization_summary.html (2344, 2008-07-10)
OFDM_retiming\Timing_Symcronization.ise (239161, 2008-07-10)
OFDM_retiming\Timing_Symcronization.ise_ISE_Backup (239161, 2008-07-10)
OFDM_retiming\Timing_Symcronization.restore (48970, 2008-07-10)
OFDM_retiming\_xmsgs (0, 2008-07-10)
OFDM_retiming\__ISE_repository_Timing_Symcronization.ise_.lock (200, 2008-07-10)
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