lora-modulator
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：296KB
下载次数：1
上传日期：2020-06-20 03:47:41
上 传 者：
sh-1993
说明： LoRa调制器在Lattice ECP5 FPGA上的实现与AT86RF215 I Q Radio接口
(LoRa modulator implementation on Lattice ECP5 FPGA to interface with AT86RF215 I Q Radio)
文件列表:
LICENSE (1071, 2020-06-20)
lora_tx.ldf (3004, 2020-06-20)
lora_tx_tcr.dir (0, 2020-06-20)
lora_tx_tcr.dir\pn200618223143.tcr (300, 2020-06-20)
project (0, 2020-06-20)
project\flash.xcf (3273, 2020-06-20)
project\lora_tx.sty (13702, 2020-06-20)
project\lora_tx_clarity (0, 2020-06-20)
project\lora_tx_clarity\archv (0, 2020-06-20)
project\lora_tx_clarity\archv\my_pll_64mhz.zip (147846, 2020-06-20)
project\lora_tx_clarity\lora_tx_clarity.sbx (39572, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz (0, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\generate_core.tcl (2004, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\generate_ngd.tcl (2945, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\my_pll_64mhz.cmd (709, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\my_pll_64mhz.cst (31, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\my_pll_64mhz.edn (7801, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\my_pll_64mhz.fdc (29, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\my_pll_64mhz.lpc (1768, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\my_pll_64mhz.ngd (6682, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\my_pll_64mhz.ngo (3660, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\my_pll_64mhz.srp (1278, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\my_pll_64mhz.v (3397, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\my_pll_64mhz_ngd.asd (20, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\my_pll_64mhz_tmpl.v (268, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\stdout.log.bak (2955, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\stdout.log.bak.1 (2933, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\syn_results (0, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\syn_results\backup (0, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\syn_results\backup\my_pll_64mhz.srr (19446, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\syn_results\dm (0, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\syn_results\dm\layer0.xdm (7793, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\syn_results\my_pll_64mhz.areasrr (723, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\syn_results\my_pll_64mhz.edn (9263, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\syn_results\my_pll_64mhz.fse (0, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\syn_results\my_pll_64mhz.htm (252, 2020-06-20)
project\lora_tx_clarity\my_pll_64mhz\syn_results\my_pll_64mhz.prj (1417, 2020-06-20)
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## LoRa Modulator
We implement a custom LoRa modulator that supports different bandwidths and spreading factors (SF) on Lattice ECP5 FPGA and I/Q interface with AT86RF215 RF radio.
## Contributers
- [Mehrdad Hessar](https://github.com/mehrdadh)
- [Ali Najafi](https://github.com/anajafi)
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