regfiles
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：340KB
下载次数：0
上传日期：2020-07-04 19:18:18
上 传 者：
上的啥
说明： verilog实现regfiles，可直接下板，数字逻辑实验
(Verilog realizes regfiles, which can be directly off the board, digital logic experiment)
文件列表:
project_28 (0, 2020-07-04)
project_28\project_28.cache (0, 2020-07-04)
project_28\project_28.cache\compile_simlib (0, 2019-12-04)
project_28\project_28.cache\compile_simlib\activehdl (0, 2019-12-04)
project_28\project_28.cache\compile_simlib\ies (0, 2019-12-04)
project_28\project_28.cache\compile_simlib\modelsim (0, 2019-12-04)
project_28\project_28.cache\compile_simlib\questa (0, 2019-12-04)
project_28\project_28.cache\compile_simlib\riviera (0, 2019-12-04)
project_28\project_28.cache\compile_simlib\vcs (0, 2019-12-04)
project_28\project_28.cache\wt (0, 2019-12-04)
project_28\project_28.cache\wt\java_command_handlers.wdf (913, 2020-07-04)
project_28\project_28.cache\wt\project.wpc (61, 2020-07-04)
project_28\project_28.cache\wt\webtalk_pa.xml (1970, 2020-07-04)
project_28\project_28.cache\wt\xsim.wdf (256, 2019-11-23)
project_28\project_28.hw (0, 2020-07-04)
project_28\project_28.hw\project_28.lpr (290, 2019-11-22)
project_28\project_28.hw\webtalk (0, 2020-07-04)
project_28\project_28.hw\webtalk\.xsim_webtallk.info (59, 2020-07-04)
project_28\project_28.hw\webtalk\labtool_webtalk.log (368, 2020-07-04)
project_28\project_28.hw\webtalk\usage_statistics_ext_labtool.html (2910, 2020-07-04)
project_28\project_28.hw\webtalk\usage_statistics_ext_labtool.xml (2476, 2020-07-04)
project_28\project_28.ip_user_files (0, 2019-11-23)
project_28\project_28.sim (0, 2020-07-04)
project_28\project_28.sim\sim_1 (0, 2019-11-23)
project_28\project_28.sim\sim_1\behav (0, 2019-11-23)
project_28\project_28.sim\sim_1\behav\.Xil (0, 2019-11-23)
project_28\project_28.sim\sim_1\behav\.Xil\Webtalk-53908- (0, 2019-11-23)
project_28\project_28.sim\sim_1\behav\.Xil\Webtalk-53908-\webtalk (0, 2019-11-23)
project_28\project_28.sim\sim_1\behav\compile.bat (323, 2019-11-23)
project_28\project_28.sim\sim_1\behav\compile.log (741, 2019-11-23)
project_28\project_28.sim\sim_1\behav\elaborate.bat (411, 2019-11-23)
project_28\project_28.sim\sim_1\behav\elaborate.log (1206, 2019-11-23)
project_28\project_28.sim\sim_1\behav\glbl.v (1470, 2016-06-02)
project_28\project_28.sim\sim_1\behav\Regfiles_tb.tcl (460, 2019-11-23)
project_28\project_28.sim\sim_1\behav\Regfiles_tb_behav.wdb (346398, 2019-11-23)
project_28\project_28.sim\sim_1\behav\Regfiles_tb_vlog.prj (304, 2019-11-23)
project_28\project_28.sim\sim_1\behav\simulate.bat (288, 2019-11-23)
project_28\project_28.sim\sim_1\behav\simulate.log (0, 2019-11-23)
project_28\project_28.sim\sim_1\behav\webtalk.jou (832, 2019-11-23)
... ...
The files in this directory structure are automatically generated and managed by Vivado. Editing these files is not recommended.
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