servo_ctr
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：15877KB
下载次数：3
上传日期：2020-07-18 23:23:47
上 传 者：
9518style
说明： 通过网口UDP协议，接收上位机控制命令，用于控制转台状态，并通过串口读取并通过网口上传转台工作状态
(Through the network port UDP protocol, receive the upper computer control command, used to control the status of the turntable, and read through the serial port and upload the working state of the turntable through the network port)
文件列表:
servo_ctr_8734_20190610\12.wcfg (3529, 2019-05-10)
servo_ctr_8734_20190610\232test.cpj (75201, 2019-06-20)
servo_ctr_8734_20190610\ARP_analysis1.v (5806, 2019-06-04)
servo_ctr_8734_20190610\ARP_request1.v (10969, 2019-06-04)
servo_ctr_8734_20190610\ARP_response1.v (10316, 2019-06-04)
servo_ctr_8734_20190610\auto_project.ipf (21196, 2020-01-22)
servo_ctr_8734_20190610\auto_project_1.ipf (44903, 2020-01-20)
servo_ctr_8734_20190610\blk_mem_gen_v7_3.mif (750, 2019-03-28)
servo_ctr_8734_20190610\clk_rst_gen.cmd_log (243, 2019-05-02)
servo_ctr_8734_20190610\clk_rst_gen.v (1469, 2019-05-19)
servo_ctr_8734_20190610\crc.v (3862, 2019-03-15)
servo_ctr_8734_20190610\data_rdy1.v (10888, 2019-06-10)
servo_ctr_8734_20190610\data_receive1.v (3969, 2019-05-21)
servo_ctr_8734_20190610\DBF_cmd.cmd_log (231, 2019-05-09)
servo_ctr_8734_20190610\DBF_cmd.v (2480, 2019-05-11)
servo_ctr_8734_20190610\DEV.coe (471, 2019-03-27)
servo_ctr_8734_20190610\DEV_ip.mif (750, 2019-03-28)
servo_ctr_8734_20190610\E1116R_cfg1.v (8100, 2019-06-20)
servo_ctr_8734_20190610\ethernet_send_cmd.cmd_log (528, 2019-05-25)
servo_ctr_8734_20190610\ethernet_send_cmd.gise (14514, 2019-06-21)
servo_ctr_8734_20190610\ethernet_send_cmd.v (3637, 2019-06-10)
servo_ctr_8734_20190610\ethernet_send_cmd.xise (45054, 2019-06-20)
servo_ctr_8734_20190610\fuse.xmsgs (367, 2019-05-26)
servo_ctr_8734_20190610\fuseRelaunch.cmd (271, 2019-05-26)
servo_ctr_8734_20190610\GPS_cmd.cmd_log (231, 2019-05-09)
servo_ctr_8734_20190610\GPS_cmd.lso (6, 2019-05-10)
servo_ctr_8734_20190610\GPS_cmd.v (1850, 2019-05-11)
servo_ctr_8734_20190610\impact.xsl (1477, 2020-02-21)
servo_ctr_8734_20190610\impact_impact.xwbt (274, 2020-02-21)
servo_ctr_8734_20190610\ipcore_dir\coregen.cgp (238, 2019-05-19)
servo_ctr_8734_20190610\ipcore_dir\create_zt_fifo.tcl (1268, 2019-05-19)
servo_ctr_8734_20190610\ipcore_dir\tmp\zt_fifo.lso (6, 2019-05-19)
servo_ctr_8734_20190610\ipcore_dir\tmp\_xmsgs\pn_parser.xmsgs (772, 2019-05-19)
servo_ctr_8734_20190610\ipcore_dir\tmp\_xmsgs\xst.xmsgs (157862, 2019-05-19)
servo_ctr_8734_20190610\ipcore_dir\zt_fifo\doc\fifo_generator_v9_3_vinfo.html (10447, 2019-05-19)
servo_ctr_8734_20190610\ipcore_dir\zt_fifo\doc\pg057-fifo-generator.pdf (75348, 2019-05-19)
servo_ctr_8734_20190610\ipcore_dir\zt_fifo\example_design\zt_fifo_exdes.ucf (2781, 2019-05-19)
servo_ctr_8734_20190610\ipcore_dir\zt_fifo\example_design\zt_fifo_exdes.vhd (5571, 2019-05-19)
... ...
The following files were generated for 'icon_pro' in directory
F:\servo_test\servo_ctr_prj20190527_1\_ngo\cs_icon_pro\
XCO file generator:
Generate an XCO file for compatibility with legacy flows.
* icon_pro.xco
Creates an implementation netlist:
Creates an implementation netlist for the IP.
* icon_pro.ngc
* icon_pro.ucf
* icon_pro.vhd
* icon_pro.vho
Creates an HDL instantiation template:
Creates an HDL instantiation template for the IP.
* icon_pro.vho
Generate ISE metadata:
Create a metadata file for use when including this core in ISE designs
* icon_pro_xmdf.tcl
Generate ISE subproject:
Create an ISE subproject for use when including this core in ISE designs
* _xmsgs/pn_parser.xmsgs
* icon_pro.gise
Deliver Readme:
Readme file for the IP.
* icon_pro_readme.txt
Generate FLIST file:
Text file listing all of the output files produced when a customized core was
generated in the CORE Generator.
* icon_pro_flist.txt
Please see the Xilinx CORE Generator online help for further details on
generated files and how to use them.
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