TDC
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：6239KB
下载次数：2
上传日期：2020-07-23 00:24:33
上 传 者：
sh-1993
说明： 时间-数字转换器在Cyclone V（DE10 Nano）FPGA上实现。
(Time to digital converter implemented on a Cyclone V (DE10-Nano) FPGA.)
文件列表:
Docs (0, 2020-07-23)
Docs\1PortRAM (0, 2020-07-23)
Docs\1PortRAM\Cyclone_V_Memory.pdf (936301, 2020-07-23)
Docs\1PortRAM\Cyclone_V_Memory.tex (7771, 2020-07-23)
Docs\1PortRAM\memExample.v (708, 2020-07-23)
Docs\1PortRAM\pics (0, 2020-07-23)
Docs\1PortRAM\pics\IPCatalog.png (119287, 2020-07-23)
Docs\1PortRAM\pics\Mega1.png (112103, 2020-07-23)
Docs\1PortRAM\pics\Mega2.png (109029, 2020-07-23)
Docs\1PortRAM\pics\Mega3.png (91458, 2020-07-23)
Docs\1PortRAM\pics\Mega4.png (110827, 2020-07-23)
Docs\1PortRAM\pics\Mega5.png (114245, 2020-07-23)
Docs\1PortRAM\pics\Mega6.png (105162, 2020-07-23)
Docs\1PortRAM\pics\MemoryEditor.png (164528, 2020-07-23)
Docs\1PortRAM\pics\RAM1Port.png (87625, 2020-07-23)
Modules (0, 2020-07-23)
Modules\CarryChains.v (3155, 2020-07-23)
Modules\Memory.v (3574, 2020-07-23)
Modules\TDC.v (4260, 2020-07-23)
Projects (0, 2020-07-23)
Projects\Appendix.txt (204, 2020-07-23)
Projects\TDC.qar (66878, 2020-07-23)
Projects\TDC_Archive_4_21_2020.qar (28414, 2020-07-23)
Projects\TDC_Archive_5_7_2020.qar (101086, 2020-07-23)
Python (0, 2020-07-23)
Python\Devices.py (2146, 2020-07-23)
Python\QuartusMemory.py (2759, 2020-07-23)
Python\ROread.py (1500, 2020-07-23)
Python\TDC_WIP.py (1180, 2020-07-23)
Python\memoryExample.py (702, 2020-07-23)
References (0, 2020-07-23)
References\Controlled Placement of FPGA Resources.pptx (875341, 2020-07-23)
References\Cycloneii_le_wys.pdf (102101, 2020-07-23)
References\Dynamic_PLL_Tutorial.pdf (461255, 2020-07-23)
References\Links.txt (254, 2020-07-23)
References\NoteReconfigurePLL-CycloneV-Apr30-2020.docx (512739, 2020-07-23)
References\TDC_Greatest_Hits.pptx (2374430, 2020-07-23)
... ...
# TDC
Time to digital converter implemented on a Cyclone V (DE10-Nano) FPGA.
# Contents
Modules folder holds Verilog modules, including Carry Chains, Dynamic PLLs, and Memory.
Projects folder holds Quartus archived project files.
Python folder holds Python scripts for automating logic placement and memory read/write.
References folder holds sources used in creating TDC.
# To-Do
MODULES:
Test & debug Dynamic Phase Lock Loop module (Clocks.v).
Finish TDC.v by implementing system to be measured & control logic.
PYTHON:
Finish TDC.py by including automated measurement of Carry Chain regs.
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