08_spi_flash_test
所属分类:其他
开发工具:Verilog
文件大小:111KB
下载次数:2
上传日期:2020-09-24 17:37:43
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说明: M25P16读写FLASH驱动FPGA代码,具有参考意义
(M25P16 DRIVER base on FPGA sptan6)
文件列表:
08_spi_flash_test\iseconfig\spi_flash_test.projectmgr (5398, 2017-12-05)
08_spi_flash_test\iseconfig\spi_flash_test.xreport (20816, 2017-12-05)
08_spi_flash_test\sim\initM25P16.txt (6307837, 2017-12-05)
08_spi_flash_test\sim\M25P16\acdc_check.v (10560, 2017-12-05)
08_spi_flash_test\sim\M25P16\converter1.1.exe (176242, 2017-12-05)
08_spi_flash_test\sim\M25P16\initM25P16.txt (6307837, 2017-12-05)
08_spi_flash_test\sim\M25P16\initmemory.txt (6307837, 2017-12-05)
08_spi_flash_test\sim\M25P16\internal_logic.v (51062, 2017-12-05)
08_spi_flash_test\sim\M25P16\M25p16.v (1409, 2017-12-05)
08_spi_flash_test\sim\M25P16\memory_access.v (6104, 2017-12-05)
08_spi_flash_test\sim\M25P16\parameter.v (3138, 2017-12-05)
08_spi_flash_test\sim\M25P16\release notes.txt (2863, 2017-12-05)
08_spi_flash_test\sim\spi_flash_test_tb.v (635, 2017-12-05)
08_spi_flash_test\sim\start.do (616, 2017-12-05)
08_spi_flash_test\spi_flash_test.bit (340703, 2017-12-05)
08_spi_flash_test\spi_flash_test.ucf (1593, 2017-12-05)
08_spi_flash_test\spi_flash_test.xise (37635, 2017-12-05)
08_spi_flash_test\src\ax_debounce.v (4272, 2017-12-05)
08_spi_flash_test\src\seg_decoder.v (2850, 2017-12-05)
08_spi_flash_test\src\seg_scan.v (3868, 2017-12-05)
08_spi_flash_test\src\spi\spi_flash_cmd.v (7896, 2017-12-05)
08_spi_flash_test\src\spi\spi_flash_ctrl.v (8623, 2017-12-05)
08_spi_flash_test\src\spi\spi_flash_defines.v (371, 2017-12-05)
08_spi_flash_test\src\spi\spi_flash_top.v (5795, 2017-12-05)
08_spi_flash_test\src\spi\spi_master.v (5793, 2017-12-05)
08_spi_flash_test\src\spi_flash_cmd.v (7896, 2017-12-05)
08_spi_flash_test\src\spi_flash_ctrl.v (8623, 2017-12-05)
08_spi_flash_test\src\spi_flash_defines.v (371, 2017-12-05)
08_spi_flash_test\src\spi_flash_test.v (6994, 2017-12-05)
08_spi_flash_test\src\spi_flash_top.v (5796, 2017-12-05)
08_spi_flash_test\src\spi_master.v (5793, 2017-12-05)
08_spi_flash_test\xlnx_auto_0_xdb\cst.xbcd (4827, 2017-12-05)
08_spi_flash_test\xst\work\work.sdbl (75031, 2017-12-05)
08_spi_flash_test\xst\work\work.sdbx (212, 2017-12-05)
08_spi_flash_test\_ngo\netlist.lst (53, 2017-12-05)
08_spi_flash_test\_xmsgs\bitgen.xmsgs (367, 2017-12-05)
08_spi_flash_test\_xmsgs\map.xmsgs (1454, 2017-12-05)
08_spi_flash_test\_xmsgs\ngdbuild.xmsgs (367, 2017-12-05)
08_spi_flash_test\_xmsgs\par.xmsgs (367, 2017-12-05)
... ...
REV 1.2 according to Datasheet M25P16 REV 2.0 (24 November 2003)
=======================================================================================
WARNING : These Verilog models are provided "as is" without warranty of any kind,
including, but not limited to, any implied warranty of merchantability and fitness
for a particular purpose.
=======================================================================================
PROJECT ARCHITECTURE
Parameter.v
|
TestBench.v
|--------------> M25Pxx.v
| |--------------> memory_access.v
| |--------------> internal_logic.v
| |--------------> acdc_check.v
| |--------------> parameter.v
|
|--------------> M25Pxx_driver.v
The project should be compiled in the following order :
- parameter.v : define all constants
- memory_access.v : perform read/write operations
- internal_logic.v : describe internal working
- acdc_check.v : check if timings respect datasheet.
- m25pxx.v : external description of Serial Flash
- m25pxx_driver.v : stimuli + library of operations example
- testbench.v : a testbench example
TECHNICAL SUPPORT
For current information on M25Pxx products, please consult our pages on the world wide web:
www.st.com/eeprom
If you have any questions or suggestions concerning the matters raised in this document, please send
them to the following electronic mail addresses:
apps.eeprom@st.com (for application support)
ask.memory@st.com (for general enquiries)
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