t3_fpga
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：12805KB
下载次数：0
上传日期：2020-10-08 13:21:28
上 传 者：
JustLeey
说明： ADC8694四同道轮循读取，超高的的采样频率，硬件就没加保持器
(Adc8694 is read in four cycles with ultra-high sampling frequency. The hardware does not add a holder)
文件列表:
t3_fpga (0, 2019-05-28)
t3_fpga\AD_Module.qpf (1287, 2019-05-09)
t3_fpga\AD_Module.qsf (31165, 2019-05-28)
t3_fpga\AD_Module.qws (2110, 2019-05-28)
t3_fpga\AD_Module.v (13895, 2019-05-28)
t3_fpga\AD_Module.v.bak (8466, 2019-05-09)
t3_fpga\AD_Module_assignment_defaults.qdf (47533, 2019-05-27)
t3_fpga\AD_Module_description.txt (0, 2019-05-09)
t3_fpga\db (0, 2019-05-28)
t3_fpga\db\.cmp.kpt (206, 2019-05-27)
t3_fpga\db\AD_Module.(0).cnf.cdb (19337, 2019-05-28)
t3_fpga\db\AD_Module.(0).cnf.hdb (4588, 2019-05-28)
t3_fpga\db\AD_Module.(1).cnf.cdb (12914, 2019-05-27)
t3_fpga\db\AD_Module.(1).cnf.hdb (5922, 2019-05-27)
t3_fpga\db\AD_Module.(10).cnf.cdb (1764, 2019-05-27)
t3_fpga\db\AD_Module.(10).cnf.hdb (1454, 2019-05-27)
t3_fpga\db\AD_Module.(100).cnf.cdb (4930, 2019-05-28)
t3_fpga\db\AD_Module.(100).cnf.hdb (1267, 2019-05-28)
t3_fpga\db\AD_Module.(101).cnf.cdb (1344, 2019-05-28)
t3_fpga\db\AD_Module.(101).cnf.hdb (703, 2019-05-28)
t3_fpga\db\AD_Module.(102).cnf.cdb (1478, 2019-05-28)
t3_fpga\db\AD_Module.(102).cnf.hdb (704, 2019-05-28)
t3_fpga\db\AD_Module.(103).cnf.cdb (1303, 2019-05-28)
t3_fpga\db\AD_Module.(103).cnf.hdb (704, 2019-05-28)
t3_fpga\db\AD_Module.(104).cnf.cdb (1225, 2019-05-28)
t3_fpga\db\AD_Module.(104).cnf.hdb (705, 2019-05-28)
t3_fpga\db\AD_Module.(105).cnf.cdb (4210, 2019-05-28)
t3_fpga\db\AD_Module.(105).cnf.hdb (2428, 2019-05-28)
t3_fpga\db\AD_Module.(106).cnf.cdb (13660, 2019-05-28)
t3_fpga\db\AD_Module.(106).cnf.hdb (3519, 2019-05-28)
t3_fpga\db\AD_Module.(107).cnf.cdb (4930, 2019-05-28)
t3_fpga\db\AD_Module.(107).cnf.hdb (1267, 2019-05-28)
t3_fpga\db\AD_Module.(108).cnf.cdb (1344, 2019-05-28)
t3_fpga\db\AD_Module.(108).cnf.hdb (704, 2019-05-28)
t3_fpga\db\AD_Module.(109).cnf.cdb (1478, 2019-05-28)
t3_fpga\db\AD_Module.(109).cnf.hdb (705, 2019-05-28)
t3_fpga\db\AD_Module.(11).cnf.cdb (2505, 2019-05-27)
t3_fpga\db\AD_Module.(11).cnf.hdb (713, 2019-05-27)
t3_fpga\db\AD_Module.(110).cnf.cdb (1303, 2019-05-28)
t3_fpga\db\AD_Module.(110).cnf.hdb (705, 2019-05-28)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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