uart_vivado

所属分类:其他
开发工具:Verilog
文件大小:17583KB
下载次数:14
上传日期:2020-10-17 13:33:10
上 传 者邾米
说明:  UART 收发模块,可移植,编程平台为vivado
(uart communication transceiver module, portable)

文件列表:
uart_vivado\.Xil (0, 2020-10-16)
uart_vivado\.Xil\Vivado-21572-DESKTOP-9EUQTDJ (0, 2020-10-15)
uart_vivado\.Xil\Vivado-21572-DESKTOP-9EUQTDJ\elab.rtd (245094, 2020-09-09)
uart_vivado\.Xil\Vivado-21572-DESKTOP-9EUQTDJ\realtime (0, 2020-10-15)
uart_vivado\.Xil\Vivado-21572-DESKTOP-9EUQTDJ\realtime\comm_uart.tcl (3974, 2020-09-09)
uart_vivado\.Xil\Vivado-21572-DESKTOP-9EUQTDJ\realtime\dupFiles.rpt (92, 2020-09-09)
uart_vivado\.Xil\Vivado-21572-DESKTOP-9EUQTDJ\realtime\fifo_stub.v (606, 2020-09-09)
uart_vivado\.Xil\Vivado-21572-DESKTOP-9EUQTDJ\wave (0, 2020-09-09)
uart_vivado\uart.cache (0, 2020-10-16)
uart_vivado\uart.cache\compile_simlib (0, 2020-10-15)
uart_vivado\uart.cache\compile_simlib\activehdl (0, 2020-09-09)
uart_vivado\uart.cache\compile_simlib\ies (0, 2020-09-09)
uart_vivado\uart.cache\compile_simlib\modelsim (0, 2020-09-09)
uart_vivado\uart.cache\compile_simlib\questa (0, 2020-09-09)
uart_vivado\uart.cache\compile_simlib\riviera (0, 2020-09-09)
uart_vivado\uart.cache\compile_simlib\vcs (0, 2020-09-09)
uart_vivado\uart.cache\compile_simlib\xcelium (0, 2020-09-09)
uart_vivado\uart.cache\ip (0, 2020-10-15)
uart_vivado\uart.cache\ip\2018.2 (0, 2020-10-15)
uart_vivado\uart.cache\ip\2018.2\65e8f602eedd5c50.logs (0, 2020-10-15)
uart_vivado\uart.cache\ip\2018.2\65e8f602eedd5c50.logs\runme.log (41623, 2020-09-09)
uart_vivado\uart.cache\ip\2018.2\65e8f602eedd5c50 (0, 2020-10-15)
uart_vivado\uart.cache\ip\2018.2\65e8f602eedd5c50\65e8f602eedd5c50.xci (26690, 2020-09-09)
uart_vivado\uart.cache\ip\2018.2\65e8f602eedd5c50\fifo.dcp (65661, 2020-09-09)
uart_vivado\uart.cache\ip\2018.2\65e8f602eedd5c50\fifo_sim_netlist.v (102348, 2020-09-09)
uart_vivado\uart.cache\ip\2018.2\65e8f602eedd5c50\fifo_sim_netlist.vhdl (150229, 2020-09-09)
uart_vivado\uart.cache\ip\2018.2\65e8f602eedd5c50\fifo_stub.v (1575, 2020-09-09)
uart_vivado\uart.cache\ip\2018.2\65e8f602eedd5c50\fifo_stub.vhdl (1735, 2020-09-09)
uart_vivado\uart.cache\ip\2018.2\65e8f602eedd5c50\stats.txt (115, 2020-09-09)
uart_vivado\uart.cache\wt (0, 2020-10-15)
uart_vivado\uart.cache\wt\gui_handlers.wdf (6562, 2020-10-16)
uart_vivado\uart.cache\wt\java_command_handlers.wdf (1836, 2020-10-16)
uart_vivado\uart.cache\wt\project.wpc (121, 2020-10-16)
uart_vivado\uart.cache\wt\synthesis.wdf (5087, 2020-09-09)
uart_vivado\uart.cache\wt\synthesis_details.wdf (100, 2020-09-09)
uart_vivado\uart.cache\wt\webtalk_pa.xml (6312, 2020-10-16)
uart_vivado\uart.hw (0, 2020-10-16)
uart_vivado\uart.hw\hw_1 (0, 2020-10-15)
uart_vivado\uart.hw\hw_1\hw.xml (1533, 2020-09-09)
uart_vivado\uart.hw\hw_1\layout (0, 2020-09-09)
... ...

The files in this directory structure are automatically generated and managed by Vivado. Editing these files is not recommended.

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