说明：  Verilog HDL（ Hardware Description Language） 是在用途最广泛的C语言的基础上发展 起来的一种硬件描述语言， 具有灵活性高、 易学易用等特点。 Verilog HDL可以在较短的时间 内学习和掌握， 目前已经在FPGA开发/IC设计领域占据绝对的领导地位。
(Verilog HDL (hardware description language) is based on the most widely used C language It is a kind of hardware description language with high flexibility and easy to learn and use. Verilog HDL can be used in a short time At present, it has occupied an absolute leading position in the field of FPGA development / IC design.)