class18_TLV1544
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：1494KB
下载次数：0
上传日期：2021-04-02 19:10:16
上 传 者：
勿恋影中人
说明： TLV1544软件设计。基于FPGA并行设计，入门级设计程序
(TLV1544 software design.Based on FPGA parallel design, entry level design procedures)
文件列表:
class18_TLV1544\doc\18_SPI接口多通道ADC驱动设计与验证.docx (832907, 2016-06-20)
class18_TLV1544\doc\TLV1544.pdf (863055, 2015-08-22)
class18_TLV1544\prj\ip\greybox_tmp\cbx_args.txt (219, 2015-12-26)
class18_TLV1544\prj\ip\ISSP.qip (293, 2015-12-26)
class18_TLV1544\prj\ip\ISSP.v (3955, 2015-12-26)
class18_TLV1544\prj\ip\ISSP1.qip (295, 2015-12-26)
class18_TLV1544\prj\ip\ISSP1.v (3937, 2015-12-26)
class18_TLV1544\prj\ip\ISSP1_bb.v (2899, 2015-12-26)
class18_TLV1544\prj\ip\ISSP_bb.v (2912, 2015-12-26)
class18_TLV1544\prj\output_files\Chain3.cdf (364, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.asm.rpt (7976, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.done (26, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.eda.rpt (8149, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.fit.rpt (317684, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.fit.smsg (703, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.fit.summary (619, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.flow.rpt (12250, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.jdi (8582, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.map.rpt (66028, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.map.summary (479, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.pin (33063, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.sof (361575, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.sta.rpt (670387, 2015-12-26)
class18_TLV1544\prj\output_files\TLV1544_CTRL.sta.summary (1641, 2015-12-26)
class18_TLV1544\prj\stp1.stp (241826, 2015-12-26)
class18_TLV1544\prj\stp1_auto_stripped.stp (241845, 2015-12-26)
class18_TLV1544\prj\TLV1544_CTRL.qpf (1285, 2015-12-26)
class18_TLV1544\prj\TLV1544_CTRL.qsf (5194, 2015-12-26)
class18_TLV1544\prj\TLV1544_CTRL.qws (4620, 2015-12-26)
class18_TLV1544\prj\TLV1544_CTRL_nativelink_simulation.rpt (995, 2015-12-26)
class18_TLV1544\rtl\ADDA_TEST.v (1618, 2015-12-26)
class18_TLV1544\rtl\ADDA_TEST.v.bak (48, 2015-12-26)
class18_TLV1544\rtl\key_filter.v (2557, 2015-12-26)
class18_TLV1544\rtl\TLC5620_CTRL.v (2484, 2015-12-26)
class18_TLV1544\rtl\TLV1544_CTRL.v (3425, 2015-12-26)
class18_TLV1544\rtl\TLV1544_CTRL.v.bak (45, 2015-12-26)
class18_TLV1544\testbench\TLV1544_CTRL_tb.v (1700, 2015-12-26)
class18_TLV1544\testbench\TLV1544_CTRL_tb.v.bak (70, 2015-12-26)
class18_TLV1544\文件夹模版.txt (216, 2015-07-19)
class18_TLV1544\prj\ip\greybox_tmp (0, 2015-12-26)
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