Ethdev_bsp

所属分类:嵌入式/单片机/硬件编程
开发工具:MultiPlatform
文件大小:1172KB
下载次数:321
上传日期:2006-03-28 22:55:46
上 传 者nansan
说明:  此文档为采用FPGA实现的以太网MAC层,以及嵌入式的TCP/IP协议栈
(this document for the introduction of FPGA Ethernet MAC layer, as well as embedded TCP/IP protocol stack)

文件列表:
EthDev\doc\baud.xls (14336, 2005-09-11)
EthDev\doc\BOM.XLS (27136, 2005-09-19)
EthDev\doc\HLD.pdf (30062, 2005-10-04)
EthDev\doc\HLD.vsd (45056, 2005-10-04)
EthDev\doc\Resources.xls (17920, 2005-09-11)
EthDev\doc\Schematic Prints.pdf (104611, 2005-09-19)
EthDev\doc\ethdev-ug.doc (56832, 2005-10-04)
EthDev\doc\ethdev-ug.pdf (156209, 2005-10-04)
EthDev\doc\todo.TXT (445, 2005-09-18)
EthDev\doc (0, 2005-10-05)
EthDev\pcb\EthDev.PCBDOC (1857024, 2005-10-04)
EthDev\pcb (0, 2005-10-05)
EthDev\EthDev.PRJPCB (29789, 2005-09-19)
EthDev\sch\Clocks.SCHDOC (46592, 2005-10-04)
EthDev\sch\Cyclone.SCHDOC (476160, 2005-10-04)
EthDev\sch\JTAG.SCHDOC (272384, 2005-10-04)
EthDev\sch\PHY.SCHDOC (268288, 2005-10-04)
EthDev\sch\Power.SCHDOC (77312, 2005-10-04)
EthDev\sch\RAM.SCHDOC (47104, 2005-10-04)
EthDev\sch\RS232.SCHDOC (49664, 2005-10-04)
EthDev\sch\Top.SCHDOC (319488, 2005-09-19)
EthDev\sch (0, 2005-10-05)
EthDev (0, 2005-10-05)
Ethdev_tester\i2c_core\i2c_master_bit_ctrl.v (17498, 2005-10-04)
Ethdev_tester\i2c_core\i2c_master_byte_ctrl.v (10737, 2005-10-04)
Ethdev_tester\i2c_core\i2c_master_defines.v (3409, 2005-10-04)
Ethdev_tester\i2c_core\i2c_master_top.v (10296, 2005-10-04)
Ethdev_tester\i2c_core\timescale.v (23, 2005-10-04)
Ethdev_tester\i2c_core (0, 2005-10-11)
Ethdev_tester\ethdev_tester.bdf (37901, 2005-10-11)
Ethdev_tester\ethdev_tester.qpf (928, 2005-10-04)
Ethdev_tester\ethdev_tester.qsf (10340, 2005-10-11)
Ethdev_tester\peripheraltest_cpu.ptf (76030, 2005-10-04)
Ethdev_tester\ramtest_cpu.ptf (75653, 2005-10-11)
Ethdev_tester\images\peripheraltest_ethdev_tester.pof (524488, 2005-10-11)
Ethdev_tester\images\peripheraltest_ethdev_tester.sof (281522, 2005-10-11)
Ethdev_tester\images\ramtest_ethdev_tester.pof (524488, 2005-10-11)
Ethdev_tester\images\ramtest_ethdev_tester.sof (281522, 2005-10-11)
Ethdev_tester\images (0, 2005-10-11)
Ethdev_tester\nios_peripheraltest_cpu_sdk\src\peripheral_test\Makefile (9799, 2005-10-04)
... ...

Sample projects description: - The first project contains the design files use for the 1.0C board: Ethdev: - Doc: contains documentation such as schematics and user-guide - PCB: Contains Protel PCB file - SCH: Contains protel schematic files - There are two main projects that may be used with the EthDev 1.0C boards; ethdev_tester and tcp_test. Ethdev_tester: - Located in the root of this directory is an Altera Quartus 5 project labelled Ethdev_tester. - This project is used to test the EthDev units upon assembly - There are two main configurations of this project; ram_test and peripheral_test - ram_test will do various SRAM tests to ensure proper functionality of the two SRAM modules - peripheral_test will test the following peripherals/components. The code in this configuration may be used for reference. - LEDs - Pushbuttons - 5V IO and 5V Inputs - Temperature sensor (I2C) - Real-time clock (I2C) - SPI Flash - The following describes the various files/directories - ethdev_tester.bdf - top-level schematic containing one of two NIOS processors - ramtest_cpu or peripheraltest_cpu - .qpf - Quartus project file - .qsf - Pin assignments/device settings - peripheraltest_cpu.ptf - Altera SOPC Builder configuration file for the Peripheraltest NIOS processor - ramtest_cpu.ptf - Altera SOPC Builder configuration file for the ramtest NIOS processor - images/ - contains .sof and .pof images for downloading; for both configurations - nios_peripheraltest_cpu_sdk/ - source code and Makefile for peripheral test - nios_ramtest_cpu_sdk/ - source code and Makefile for ram test - i2c_core/ - Opencores.org I2C verilog core used to interface to I2C Components - In any directory with source, type 'make' to build project, or 'make run' to build and download to board tcp_test: - This project is to demonstrate functionality of the on-board 10/100 PHY - Currently, a very-lightweight IP (no TCP) stack is used to implement a few protocols - PLEASE NOTE: This stack is not meant for any purpose OTHER than reference, and to demonstrate functionality - It has been written solely for the purpose of testing hardware, not software. - Files/directories description: - NIOS/ - Currently empty. Will hold Quartus project files in future. - rtl/ - contains Opencores.org 10/100 MAC verilog core - TSK3000/ - Contains Altium Protel TSK3000 processor project (Protel DXP2004 sp2 is used) - EthDev_3000.PRJFPG - Protel FPGA project file - EthDev_3000.PRJEMB - Protel Embedded processor project file - TCP_TEST.DSNWRK - Design workspace - hardware.h - automatically generated hardware.h file - do not modify this file! - constraint/ - contains constraint file for EthDev 1.0C board - sch/ - top-level schematic - src/ - contains light-weight IP stack.

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