adc_test
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：1908KB
下载次数：7
上传日期：2011-08-26 13:47:16
上 传 者：
guoxingliu
说明： 讲述了AD转换原理，测试程序，ISE应用更熟悉，共同分享。
(About AD conversion principle, test procedures, ISE application is more familiar with, to share.)
文件列表:
adc_test\adc_test.gise (10823, 2011-05-12)
adc_test\adc_test.xise (35414, 2011-05-12)
adc_test\clk7seg.vhd (3072, 2011-05-10)
adc_test\control549_serialtoparallel.vhd (2286, 2011-05-09)
adc_test\control549_serialtoparallel_summary.html (3703, 2011-05-11)
adc_test\cs_549.vhd (3523, 2011-05-11)
adc_test\fTest.vhd (6558, 2011-05-11)
adc_test\fTest_summary.html (3525, 2011-05-12)
adc_test\fuse.xmsgs (367, 2011-05-12)
adc_test\fuseRelaunch.cmd (140, 2011-05-12)
adc_test\ioclk.vhd (1582, 2011-05-10)
adc_test\ioclk_summary.html (3525, 2011-05-11)
adc_test\ipcore_dir\.lso (14, 2011-05-11)
adc_test\ipcore_dir\coregen.cgp (238, 2011-05-11)
adc_test\ipcore_dir\create_div.tcl (1264, 2011-05-11)
adc_test\ipcore_dir\div.asy (632, 2011-05-11)
adc_test\ipcore_dir\div.gise (1436, 2011-05-12)
adc_test\ipcore_dir\div.ncf (0, 2011-05-12)
adc_test\ipcore_dir\div.ngc (246341, 2011-05-11)
adc_test\ipcore_dir\div.sym (1829, 2011-05-11)
adc_test\ipcore_dir\div.v (347045, 2011-05-11)
adc_test\ipcore_dir\div.veo (4721, 2011-05-11)
adc_test\ipcore_dir\div.vhd (419611, 2011-05-11)
adc_test\ipcore_dir\div.vho (5030, 2011-05-11)
adc_test\ipcore_dir\div.xco (1536, 2011-05-11)
adc_test\ipcore_dir\div.xise (5193, 2011-05-12)
adc_test\ipcore_dir\div_flist.txt (169, 2011-05-11)
adc_test\ipcore_dir\div_xmdf.tcl (2936, 2011-05-11)
adc_test\ipcore_dir\tmp\_xmsgs\netgen.xmsgs (665, 2011-05-11)
adc_test\ipcore_dir\tmp\_xmsgs\ngcbuild.xmsgs (367, 2011-05-11)
adc_test\ipcore_dir\tmp\_xmsgs\pn_parser.xmsgs (749, 2011-05-11)
adc_test\ipcore_dir\tmp\_xmsgs\xst.xmsgs (71312, 2011-05-11)
adc_test\ipcore_dir\_xmsgs\cg.xmsgs (1329, 2011-05-11)
adc_test\ipcore_dir\_xmsgs\pn_parser.xmsgs (914, 2011-05-12)
adc_test\iseconfig\adc_test.projectmgr (10092, 2011-05-12)
adc_test\iseconfig\fTest.xreport (20735, 2011-05-12)
adc_test\iseconfig\ioclk.xreport (21724, 2011-05-11)
adc_test\iseconfig\top.xreport (20642, 2011-05-12)
adc_test\mux2_1.vhd (1260, 2011-05-10)
adc_test\pa.fromNetlist.tcl (649, 2011-05-12)
... ...
The following files were generated for 'icon_pro' in directory
E:\adc_test\_ngo\cs_icon_pro\
icon_pro.ejp:
Please see the core data sheet.
icon_pro.gise:
ISE Project Navigator support file. This is a generated file and should
not be edited directly.
icon_pro.ngc:
Binary Xilinx implementation netlist file containing the information
required to implement the module in a Xilinx (R) FPGA.
icon_pro.vhd:
Unisim VHDL file containing the information required to simulate
the module.
icon_pro.vho:
VHO template file containing code that can be used as a model for
instantiating a CORE Generator module in a VHDL design.
icon_pro.xco:
CORE Generator input file containing the parameters used to
regenerate a core.
icon_pro.xise:
ISE Project Navigator support file. This is a generated file and should
not be edited directly.
icon_pro_readme.txt:
Text file indicating the files generated and how they are used.
icon_pro_xmdf.tcl:
ISE Project Navigator interface file. ISE uses this file to determine
how the files output by CORE Generator for the core can be integrated
into your ISE project.
icon_pro_flist.txt:
Text file listing all of the output files produced when a customized
core was generated in the CORE Generator.
Please see the Xilinx CORE Generator online help for further details on
generated files and how to use them.
近期下载者：
相关文件：
收藏者：