Traffic-light-design
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:10KB
下载次数:6
上传日期:2011-09-07 16:10:13
上 传 者:
jingqinshan
说明: no intro
((1) to show intersections east and west in both directions of the red, yellow, green indicates the state
• Use two sets of red, yellow, and green lights as the two directions of red, yellow, green, countdown to achieve normal function
• Digital control with two north-south direction as to the things and time display, time display a red light 55 seconds, 50 seconds green, yellow 5 seconds
* (2) Press the S1 key, to achieve a special state function:
• Display to the timing of the two sets of digital flash
• The counter stops counting and remains in its original state
• east and west, crossing all red light status
• Special lifting of the state can continue to count.
(3) to achieve the overall SB Clear function key pressed, the system achieved a total cleared, the counter counts from the initial state, the corresponding status indicator light
(4) using VHDL language design meets the functional requirements of the traffic light co)
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新建 Microsoft Word 文档.doc (72192, 2011-09-07)
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