83399055ref-sdr-sdram-verilog
所属分类：VHDL/FPGA/Verilog
开发工具：C/C++
文件大小：702KB
下载次数：3
上传日期：2011-09-09 20:56:39
上 传 者：
3003450
说明： Summary: InterPreTS (Interaction Prediction through Tertiary Structure) is a web-based version of our hod for predicting protein-protein interactions (Aloy and Russell, 2002, Proc. Natl Acad. Sci. USA, 99, 5896-5901). Given a pair of query sequences, we first search for homologues in a database of interacting domains (DBID) of known three-dimensional complex structures. Pairs of sequences homologous to a known interacting pair
(Summary: InterPreTS (Interaction Prediction through Tertiary Structure) is a web-based version of our method for predicting protein-proteiinteractions (Aloy and Russell, 2002, Proc. Natl Acad. Sci. USA, 99, 5896-5901). Given a pair of query sequences, we first search for homologues in a database of interacting domains (DBID) of known three-dimensional complex structures. Pairs of sequences homologous to a known interacting pair)
文件列表:
8339''9055ref-sdr-sdram-verilog\help.txt (324, 2005-03-22)
8339''9055ref-sdr-sdram-verilog\sdr_sdram.pdf (917283, 2002-09-02)
8339''9055ref-sdr-sdram-verilog\simulation\sdr_sdram_tb.v (22444, 2000-07-12)
8339''9055ref-sdr-sdram-verilog\source\altclklock.v (8543, 2000-06-12)
8339''9055ref-sdr-sdram-verilog\source\Command.v (17328, 2000-07-28)
8339''9055ref-sdr-sdram-verilog\source\compile_all.v (206, 2000-05-19)
8339''9055ref-sdr-sdram-verilog\source\control_interface.v (8463, 2000-07-28)
8339''9055ref-sdr-sdram-verilog\source\Params.v (935, 2000-07-06)
8339''9055ref-sdr-sdram-verilog\source\PLL1.v (4754, 2000-05-23)
8339''9055ref-sdr-sdram-verilog\source\sdr_data_path.v (2747, 2000-07-28)
8339''9055ref-sdr-sdram-verilog\source\sdr_sdram.v (6942, 2000-07-28)
8339''9055ref-sdr-sdram-verilog\doc (0, 2002-09-11)
8339''9055ref-sdr-sdram-verilog\simulation (0, 2002-09-11)
8339''9055ref-sdr-sdram-verilog\source (0, 2002-09-11)
8339''9055ref-sdr-sdram-verilog (0, 2011-09-09)
SDR SDRAM Controller v1.1 readme.txt
This readme file for the SDR SDRAM Controller includes information that was not
incorporated into the SDR SDRAM Controller White Paper v1.1.
The PLL is targeted at APEX(TM) devices. Please regenerate for your chosen architecture.
Last updated September, 2002
Copyright 2002 Altera Corporation. All rights reserved.
近期下载者：
相关文件：
收藏者：