task22constant
所属分类：VHDL/FPGA/Verilog
开发工具：Visual Basic
文件大小：567KB
下载次数：35
上传日期：2011-09-10 00:29:34
上 传 者：
xuefen09
说明： 清华大学电子课程设计：Verilog语言，Quartus可以正确运行，下载到FPGA上可完成PC与FPGA一串数据的连续收发，且实现本地回环，异步串口通信
(Verilog language, Quartus can be correctly downloaded to the FPGA to be completed by PC and FPGA transceivers continuous string of data, and implement local loop, asynchronous serial communication)
文件列表:
task22回环\addcount.bsf (1783, 2011-09-01)
task22回环\addcount.v (213, 2011-09-01)
task22回环\addcount.v.bak (213, 2011-08-31)
task22回环\change.bsf (1605, 2011-08-31)
task22回环\change.v (90, 2011-08-31)
task22回环\clk16.bsf (1702, 2011-08-31)
task22回环\clk16.v (258, 2011-08-30)
task22回环\db\prev_cmp_task2.asm.qmsg (2174, 2011-09-02)
task22回环\db\prev_cmp_task2.fit.qmsg (32302, 2011-09-02)
task22回环\db\prev_cmp_task2.map.qmsg (2344, 2011-09-02)
task22回环\db\prev_cmp_task2.qmsg (2344, 2011-09-02)
task22回环\db\prev_cmp_task2.tan.qmsg (63472, 2011-09-02)
task22回环\db\task2.(0).cnf.cdb (2103, 2011-09-02)
task22回环\db\task2.(0).cnf.hdb (982, 2011-09-02)
task22回环\db\task2.(1).cnf.cdb (6334, 2011-09-02)
task22回环\db\task2.(1).cnf.hdb (1218, 2011-09-02)
task22回环\db\task2.(11).cnf.cdb (1241, 2011-08-31)
task22回环\db\task2.(11).cnf.hdb (775, 2011-08-31)
task22回环\db\task2.(12).cnf.cdb (1469, 2011-08-31)
task22回环\db\task2.(12).cnf.hdb (812, 2011-08-31)
task22回环\db\task2.(13).cnf.cdb (1043, 2011-09-01)
task22回环\db\task2.(13).cnf.hdb (783, 2011-09-01)
task22回环\db\task2.(14).cnf.cdb (825, 2011-08-31)
task22回环\db\task2.(14).cnf.hdb (498, 2011-08-31)
task22回环\db\task2.(15).cnf.cdb (1910, 2011-08-31)
task22回环\db\task2.(15).cnf.hdb (884, 2011-08-31)
task22回环\db\task2.(16).cnf.cdb (2685, 2011-08-31)
task22回环\db\task2.(16).cnf.hdb (1638, 2011-08-31)
task22回环\db\task2.(17).cnf.cdb (543, 2011-08-31)
task22回环\db\task2.(17).cnf.hdb (448, 2011-08-31)
task22回环\db\task2.(2).cnf.cdb (2739, 2011-09-02)
task22回环\db\task2.(2).cnf.hdb (992, 2011-09-02)
task22回环\db\task2.(3).cnf.cdb (1470, 2011-08-31)
task22回环\db\task2.(3).cnf.hdb (813, 2011-08-31)
task22回环\db\task2.asm.qmsg (2174, 2011-09-02)
task22回环\db\task2.asm_labs.ddb (4571, 2011-09-02)
task22回环\db\task2.cbx.xml (87, 2011-09-02)
task22回环\db\task2.cmp.bpm (607, 2011-09-02)
task22回环\db\task2.cmp.cdb (32015, 2011-09-02)
task22回环\db\task2.cmp.ecobp (28, 2011-09-02)
... ...
欲形成连续字符的收发，即fininsh与rst连，但未成功，数据未输出，但是计数正确。
此时采用改变RX模块方法，第八位数据位到停止位中点产生finish脉冲，当finish为1且start为1时可以接收数据，rst可将finish置0，此时不能发送，所以接收装置的finish信号会采集到第八位数据时就停止，然后给高电平这样使第八个数据位缺少半个周期，只要不对rst下降沿敏感就可持续到下个周期在变化。
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