jfpjc
所属分类：VHDL/FPGA/Verilog
开发工具：Verilog
文件大小：394KB
下载次数：0
上传日期：2022-03-08 17:40:43
上 传 者：
sh-1993
说明： 约翰现场可编程JPEG压缩器；用verilog编写的jpeg压缩器。目前计划部署到Latt...
(John s Field-Programmable JPEG Compressor; a jpeg compressor written in verilog. Currently targeted to deploy to Lattice s iCE40 up5k fpga.)
文件列表:
jfpjc (0, 2022-03-09)
jfpjc\external_verilog (0, 2022-03-09)
jfpjc\external_verilog\cells_sim.v (154379, 2022-03-09)
jfpjc\logisim_bits (0, 2022-03-09)
jfpjc\logisim_bits\8_byte_input (25, 2022-03-09)
jfpjc\logisim_bits\bitpacker.circ (9938, 2022-03-09)
jfpjc\logisim_bits\control_rom_microcoding.txt (705, 2022-03-09)
jfpjc\logisim_bits\loeffler_dct_8.circ (38578, 2022-03-09)
jfpjc\logisim_bits\loeffler_dct_8_control_rom (36, 2022-03-09)
jfpjc\logisim_bits\square_root.circ (8877, 2022-03-09)
jfpjc\logisim_bits\widthchanger.circ (8584, 2022-03-09)
jfpjc\testbench (0, 2022-03-09)
jfpjc\testbench\Makefile (250, 2022-03-09)
jfpjc\testbench\bitpacker_tb (0, 2022-03-09)
jfpjc\testbench\bitpacker_tb\Makefile (141, 2022-03-09)
jfpjc\testbench\bitpacker_tb\bitpacker_tb.v (3312, 2022-03-09)
jfpjc\testbench\bytestuffer_tb (0, 2022-03-09)
jfpjc\testbench\bytestuffer_tb\Makefile (173, 2022-03-09)
jfpjc\testbench\bytestuffer_tb\bytestuffer_tb.v (4910, 2022-03-09)
jfpjc\testbench\bytestuffer_tb\ffs_per_255.hextestcase (120, 2022-03-09)
jfpjc\testbench\c_common (0, 2022-03-09)
jfpjc\testbench\c_common\dct_8.c (8352, 2022-03-09)
jfpjc\testbench\c_common\dct_utils.c (7080, 2022-03-09)
jfpjc\testbench\c_common\dct_utils.h (125, 2022-03-09)
jfpjc\testbench\c_common\vpi_jpeg_utils.c (10493, 2022-03-09)
jfpjc\testbench\camera_ingester_tb (0, 2022-03-09)
jfpjc\testbench\camera_ingester_tb\Makefile (246, 2022-03-09)
jfpjc\testbench\camera_ingester_tb\camera_ingester_tb.v (7455, 2022-03-09)
jfpjc\testbench\coefficient_encoder_tb (0, 2022-03-09)
jfpjc\testbench\coefficient_encoder_tb\Makefile (181, 2022-03-09)
jfpjc\testbench\coefficient_encoder_tb\coefficient_encoder_tb.v (1091, 2022-03-09)
jfpjc\testbench\common_data (0, 2022-03-09)
jfpjc\testbench\common_data\jpeg_header_info.hextestcase (1160, 2022-03-09)
... ...
#### JFPJC: "John's Field-Programmable JPEG Compressor"
This project consists of JPEG compressors written for mobile platforms. It includes a partial Verilog and a partial C implementation of the original JPEG spec.
What's the POINT of it?
* I feel like it
What are some salient features?
* Corners may be cut for the sake of power consumption
* It will probably suck
* It's a hardware device
* It's a straightforward adaptation of standard
##### The Verilog one
The Verilog jpeg compressor can be found under the `jfpjc` directory. Right now, it only compresses 320x240 grayscale images and only synthesizes for an iCE40 UltraPlus FPGA, but I plan to make it more general.
It can compress 320x240 grayscale images on an iCE40 at 10fps while taking less than 4 milliWatts. The design has enough clock slack to work up to 90 frames per second, but I haven't tested beyond 10fps.
##### The C one
A C jpeg compressor for microcontrollers can be found under the `jmcujc` directory. It's been tested on an Apollo3 microcontroller, where it can compress images at 3fps while taking about 10 milliWatts.
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