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MIPS_cpu_verilog

verilog CPU cpu verilog MIPS verilog mips cpu verilog 流水线

所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：18KB
下载次数：21
上传日期：2011-09-20 11:16:08
上传者：r0500s2005

说明：带流水线的类MIPS CPU verilog源代码
(With lines of class MIPS CPU verilog source code)

文件列表:

MIPS_cpu_verilog (0, 2011-09-14)
MIPS_cpu_verilog\ALU.v (4271, 2009-01-20)
MIPS_cpu_verilog\branchlogic.v (703, 2009-01-18)
MIPS_cpu_verilog\carry_save_mult.v (5242, 2009-01-20)
MIPS_cpu_verilog\DataCycle.v (5096, 2009-01-20)
MIPS_cpu_verilog\DataCycle1.v (11543, 2009-01-16)
MIPS_cpu_verilog\decoder.v (3807, 2009-01-20)
MIPS_cpu_verilog\divide1.v (4234, 2009-01-20)
MIPS_cpu_verilog\div_array.v (1401, 2009-01-20)
MIPS_cpu_verilog\membus.v (2142, 2009-01-20)
MIPS_cpu_verilog\mux.v (3152, 2008-12-25)
MIPS_cpu_verilog\Newdefine.h (3998, 2009-01-20)
MIPS_cpu_verilog\newsignexpand.v (1036, 2009-01-20)
MIPS_cpu_verilog\pc.v (703, 2009-01-20)
MIPS_cpu_verilog\pipeline.v (940, 2009-01-20)
MIPS_cpu_verilog\regfile.v (1203, 2009-01-20)
MIPS_cpu_verilog\shifter32.v (716, 2009-01-20)
MIPS_cpu_verilog\test.v (2036, 2009-01-16)
MIPS_cpu_verilog\timescale.v (79, 2008-12-11)

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