说明：  VHDL数字电路设计教程 作者：（巴西）佩德罗尼（Pedroni,V.A.） 著，乔庐峰 等译 本书采用将数字电路系统设计实例与可编程逻辑相结合的方法，通过大量实例，对如何采用VHDL进行电路设计进行了全面阐述。 本书分为三大部分：首先详细介绍VHDL语言的背景知识、基本语法结构和VHDL代码的编写方法；然后介绍VHDL电路单元库的结构和使用方法，以及如何将新的设计加入到现有的或自己新建立的单元库中，以便于进行代码的分割、共享和重用；最后介绍PLD和FPGA的发展历史、主流厂商所提供的开发环境的使用方法。
(Author: (Brazil), Pedroni (Pedroni, VA) forward, Joe Lu Feng and other translations of the book uses examples of digital circuitry and programmable logic design method of combining, through a large number of examples on how to use VHDL to circuit design a comprehensive exposition. This book is divided into three parts: the first detailed introduction to the VHDL language, background knowledge, basic grammatical structures and the compilation of the VHDL code and introduction to the VHDL circuit structure and use of cell libraries, and how the new design added to the existing or their own newly created cell library in order to facilitate the division of code sharing and reuse Finally PLD and FPGA development history, the mainstream development environment provided by manufacturers to use.)