ethernet-fmc-axi-eth
所属分类：以太坊
开发工具：Tcl
文件大小：1460KB
下载次数：0
上传日期：2022-12-08 08:20:12
上 传 者：
sh-1993
说明： 使用4个AXI以太网子系统IP块的以太网FMC的示例设计
(Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks)
文件列表:
EmbeddedSw (0, 2021-06-02)
EmbeddedSw\ThirdParty (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_19 (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_19\data (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_19\data\lwip211.mld (12193, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_19\src (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_19\src\contrib (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_19\src\contrib\ports (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_19\src\contrib\ports\xilinx (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_19\src\contrib\ports\xilinx\netif (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_19\src\contrib\ports\xilinx\netif\xaxiemacif_physpeed.c (29229, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_19\src\contrib\ports\xilinx\netif\xemacpsif_physpeed.c (36912, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_39 (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_39\data (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_39\data\lwip211.mld (11159, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_39\src (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_39\src\contrib (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_39\src\contrib\ports (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_39\src\contrib\ports\xilinx (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_39\src\contrib\ports\xilinx\netif (0, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_39\src\contrib\ports\xilinx\netif\xaxiemacif_physpeed.c (29820, 2021-06-02)
EmbeddedSw\ThirdParty\sw_services\lwip211_v1_39\src\contrib\ports\xilinx\netif\xemacpsif_physpeed.c (36805, 2021-06-02)
EmbeddedSw\XilinxProcessorIPLib (0, 2021-06-02)
EmbeddedSw\XilinxProcessorIPLib\drivers (0, 2021-06-02)
EmbeddedSw\XilinxProcessorIPLib\drivers\axiethernet_v5_119 (0, 2021-06-02)
EmbeddedSw\XilinxProcessorIPLib\drivers\axiethernet_v5_119\data (0, 2021-06-02)
EmbeddedSw\XilinxProcessorIPLib\drivers\axiethernet_v5_119\data\axiethernet.mdd (609, 2021-06-02)
EmbeddedSw\XilinxProcessorIPLib\drivers\axiethernet_v5_119\data\axiethernet.tcl (53405, 2021-06-02)
EmbeddedSw\XilinxProcessorIPLib\drivers\axiethernet_v5_99 (0, 2021-06-02)
EmbeddedSw\XilinxProcessorIPLib\drivers\axiethernet_v5_99\data (0, 2021-06-02)
EmbeddedSw\XilinxProcessorIPLib\drivers\axiethernet_v5_99\data\axiethernet.mdd (1679, 2021-06-02)
EmbeddedSw\XilinxProcessorIPLib\drivers\axiethernet_v5_99\data\axiethernet.tcl (52883, 2021-06-02)
LICENSE.txt (1085, 2021-06-02)
PetaLinux (0, 2021-06-02)
PetaLinux\build-petalinux (4152, 2021-06-02)
PetaLinux\src (0, 2021-06-02)
... ...
AXI Ethernet Reference Designs for Ethernet FMC
===============================================
## Description
This project demonstrates the use of the Opsero [Quad Gigabit Ethernet FMC](https://ethernetfmc.com "Ethernet FMC") and it supports
several FPGA/MPSoC development boards. The design contains 4 AXI Ethernet blocks configured with DMAs.
Important links:
* The user guide for these reference designs is hosted here: [AXI Ethernet for Ethernet FMC docs](https://axieth.ethernetfmc.com "AXI Ethernet for Ethernet FMC docs")
* To report a bug: [Report an issue](https://github.com/fpgadeveloper/ethernet-fmc-axi-eth/issues "Report an issue").
* For technical support: [Contact Opsero](https://opsero.com/contact-us "Contact Opsero").
* To purchase the mezzanine card: [Ethernet FMC order page](https://opsero.com/product/ethernet-fmc "Ethernet FMC order page").
## Requirements
This project is designed for version 2020.2 of the Xilinx tools (Vivado/Vitis/PetaLinux).
If you are using an older version of the Xilinx tools, then refer to the
[release tags](https://github.com/fpgadeveloper/ethernet-fmc-axi-eth/releases "releases")
to find the version of this repository that matches your version of the tools.
In order to test this design on hardware, you will need the following:
* Vivado 2020.2
* Vitis 2020.2
* PetaLinux Tools 2020.2
* [Ethernet FMC](https://ethernetfmc.com "Ethernet FMC")
* One of the [supported evaluation boards](https://axieth.ethernetfmc.com/en/latest/supported_carriers.html)
* [Xilinx Soft TEMAC license](https://ethernetfmc.com/getting-a-license-for-the-xilinx-tri-mode-ethernet-mac/ "Xilinx Soft TEMAC license")
## Contribute
We encourage contribution to these projects. If you spot issues or you want to add designs for other platforms, please
make a pull request.
## About us
This project was developed by [Opsero Inc.](https://opsero.com "Opsero Inc."),
a tight-knit team of FPGA experts delivering FPGA products and design services to start-ups and tech companies.
Follow our blog, [FPGA Developer](https://www.fpgadeveloper.com "FPGA Developer"), for news, tutorials and
updates on the awesome projects we work on.
近期下载者：
相关文件：
收藏者：