VHDLProjects
所属分类：处理器开发
开发工具：VHDL
文件大小：868KB
下载次数：0
上传日期：2023-03-18 13:20:31
上 传 者：
sh-1993
说明： 我的VHDL学术项目，包括加密加速器、RISC-V处理器实现
(My VHDL academic projects including cryptography accelerators, a RISC-V processor implementation)
文件列表:
E0 implementation (0, 2023-03-18)
E0 implementation\E0WithSRL.vhd (4050, 2023-03-18)
E0 implementation\LFSR1SRL.vhd (1905, 2023-03-18)
E0 implementation\LFSR2SRL.vhd (1915, 2023-03-18)
E0 implementation\LFSR3SRL.vhd (1881, 2023-03-18)
E0 implementation\LFSR4SRL.vhd (1879, 2023-03-18)
E0 implementation\T1.vhd (896, 2023-03-18)
E0 implementation\T2.vhd (1073, 2023-03-18)
E0 implementation\divide2.vhd (931, 2023-03-18)
E0 implementation\testE0WithSRL.vhd (1087, 2023-03-18)
E0 implementation\testE0WithSRLVerilog.v (488, 2023-03-18)
GCD Corprocessor (0, 2023-03-18)
GCD Corprocessor\No OS (0, 2023-03-18)
GCD Corprocessor\No OS\coprocBonusNoOS.c (6599, 2023-03-18)
GCD Corprocessor\With OS (0, 2023-03-18)
GCD Corprocessor\With OS\Makefile (510, 2023-03-18)
GCD Corprocessor\With OS\appWithThreads.c (2652, 2023-03-18)
GCD Corprocessor\With OS\axi_btns.c (5376, 2023-03-18)
GCD Corprocessor\With OS\load.sh (375, 2023-03-18)
GCD Corprocessor\With OS\pgcd_coproc.c (4288, 2023-03-18)
GCD Corprocessor\With OS\unload.sh (191, 2023-03-18)
GCD Corprocessor\app.c (775, 2023-03-18)
GCD Corprocessor\bd.png (96387, 2023-03-18)
GCD Corprocessor\pgcdNoOS.c (1296, 2023-03-18)
GCD Corprocessor\pgcd_coproc.c (4376, 2023-03-18)
GCD Corprocessor\pgcd_coproc_v1_0.vhd (3728, 2023-03-18)
GCD Corprocessor\pgcd_coproc_v1_0_S_AXI.vhd (17643, 2023-03-18)
Image Processing & VGA (0, 2023-03-18)
Image Processing & VGA\.DS_Store (6148, 2023-03-18)
Image Processing & VGA\SinglePortROMFileInitGeneric.vhd (2768, 2023-03-18)
Image Processing & VGA\blurFilter.vhd (1935, 2023-03-18)
Image Processing & VGA\coin_320x128.txt (1024000, 2023-03-18)
Image Processing & VGA\controller.c (5650, 2023-03-18)
Image Processing & VGA\diagram.png (516128, 2023-03-18)
Image Processing & VGA\greyfilter.vhd (3999, 2023-03-18)
Image Processing & VGA\img_processing.vhd (13829, 2023-03-18)
Image Processing & VGA\img_source.vhd (4297, 2023-03-18)
... ...
# My VHDL Projects
These are my academic projects done with VHDL
## E0 implementation
This project aims to implement the E0 crypto algorithm (for bluetooth communication). It is based on LFSR to generate pseudo random bit sequence.
## Kogge-Stone adder
This project implements a trade-off design between ripple carry adders and carry lookahead adders for a *** bits adder.
## RISC-V implementation
This project provides a functionnal model and a RTL model implementing the RISC-V processor design.
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