FPGA-based-Sudoku
所属分类：游戏
开发工具：VHDL
文件大小：40573KB
下载次数：0
上传日期：2022-01-30 14:01:59
上 传 者：
sh-1993
说明： 用VHDL编码的英特尔FPGA控制器模拟、测试和PCB设计数独游戏
(Simulation, testing, and PCB design of Sudoku game with an Intel FPGA controller coded in VHDL)
文件列表:
HDL (0, 2022-01-30)
HDL\addr_bus_mux.vhd (1790, 2022-01-30)
HDL\addr_counter.vhd (2020, 2022-01-30)
HDL\addr_decoder.vhd (2806, 2022-01-30)
HDL\clock_divider.vhd (949, 2022-01-30)
HDL\debouncer.vhd (1781, 2022-01-30)
HDL\fsm.vhd (6563, 2022-01-30)
HDL\full_design.vhd (9748, 2022-01-30)
HDL\full_design_simulation.vhd (12926, 2022-01-30)
HDL\input_key_register.vhd (1299, 2022-01-30)
HDL\input_on_register.vhd (1231, 2022-01-30)
HDL\input_timeout.vhd (1852, 2022-01-30)
HDL\key_counter.vhd (1533, 2022-01-30)
HDL\ledseg_encoder.vhd (2067, 2022-01-30)
HDL\ledseg_register.vhd (929, 2022-01-30)
HDL\open_drain.vhd (1086, 2022-01-30)
HDL\position_encoder.vhd (1798, 2022-01-30)
HDL\position_register.vhd (1433, 2022-01-30)
HDL\ram.vhd (1605, 2022-01-30)
HDL\shift_stage.vhd (2881, 2022-01-30)
HDL\transparent_decoder.vhd (2589, 2022-01-30)
IP (0, 2022-01-30)
IP\pll (0, 2022-01-30)
IP\pll\1.2_kHz (0, 2022-01-30)
IP\pll\1.2_kHz\pll.bsf (3237, 2022-01-30)
IP\pll\1.2_kHz\pll.cmp (974, 2022-01-30)
IP\pll\1.2_kHz\pll.cnx (8083, 2022-01-30)
IP\pll\1.2_kHz\pll.ppf (408, 2022-01-30)
IP\pll\1.2_kHz\pll.qip (491, 2022-01-30)
IP\pll\1.2_kHz\pll.vhd (16255, 2022-01-30)
IP\pll\100_kHz (0, 2022-01-30)
IP\pll\100_kHz\pll.bsf (3230, 2022-01-30)
IP\pll\100_kHz\pll.cmp (974, 2022-01-30)
IP\pll\100_kHz\pll.ppf (408, 2022-01-30)
IP\pll\100_kHz\pll.qip (491, 2022-01-30)
IP\pll\100_kHz\pll.vhd (16239, 2022-01-30)
... ...
# FPGA-based-Sudoku
Here you will find HDL, Quartus II, and LTspice files for my Intel MAX 10 FPGA-based Sudoku game.
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