Floating_point_32_bit_adder_sub
所属分类：硬件设计
开发工具：Verilog
文件大小：0KB
下载次数：0
上传日期：2020-12-21 09:06:22
上 传 者：
sh-1993
说明： 在该呼吸罩加减器部分中，包含测试台和模拟波形，
(in this respiratory cover adder and subtractor part and containing testbench and simulation waveform,)
文件列表:
LICENSE (35149, 2020-12-21)
_config.yml (25, 2020-12-21)
sim/ (0, 2020-12-21)
sim/adder1tb.v (1176, 2020-12-21)
sim/adder_tb.v (1109, 2020-12-21)
source/ (0, 2020-12-21)
source/32-bit_adder.v (2192, 2020-12-21)
source/fp_adder.v (3820, 2020-12-21)
# Floating_point_32_bit_adder_sub
in this respiratory cover adder and subtractor part and contaning testbench and simulation waveform
BIT FORMAT =
flow chart-
first simulation code waveform-
secod code waveform- for this code go to the below link-
https://www.edaplayground.com/x/Ct_r
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