fling_hdl
所属分类：VHDL/FPGA/Verilog
开发工具：C++
文件大小：0KB
下载次数：0
上传日期：2020-06-12 15:04:31
上 传 者：
sh-1993
说明： 硬件描述语言，其功能类似于我的自定义编程语言Fling，
(A Hardware Description Language with features similar to my custom programming language, Fling,)
文件列表:
GNUmakefile (6018, 2020-06-12)
LICENSE (35142, 2020-06-12)
fling_hdl.vim (4102, 2020-06-12)
liborangepower/ (0, 2020-06-12)
liborangepower/LICENSE (2272, 2020-06-12)
liborangepower/examples/ (0, 2020-06-12)
liborangepower/examples/example_misc_includes/ (0, 2020-06-12)
liborangepower/examples/example_misc_includes/misc_includes.hpp (796, 2020-06-12)
liborangepower/src/ (0, 2020-06-12)
liborangepower/src/arg_parsing_stuff.hpp (1902, 2020-06-12)
liborangepower/src/containers/ (0, 2020-06-12)
liborangepower/src/containers/array_2d_helper_classes.hpp (3259, 2020-06-12)
liborangepower/src/containers/array_helper_classes.hpp (1897, 2020-06-12)
liborangepower/src/containers/linked_list_classes.hpp (19183, 2020-06-12)
liborangepower/src/containers/prev_curr_pair_classes.hpp (2096, 2020-06-12)
liborangepower/src/containers/vec2_classes.hpp (582, 2020-06-12)
liborangepower/src/containers/vec2_classes_old.hpp.old (8990, 2020-06-12)
liborangepower/src/cpp_magic_old.hpp.old (17689, 2020-06-12)
liborangepower/src/defer_stuff.hpp (366, 2020-06-12)
liborangepower/src/deprecated/ (0, 2020-06-12)
liborangepower/src/deprecated/str_split_helper_classes.hpp.old (13721, 2020-06-12)
liborangepower/src/gen_class_innards_defines.hpp (6952, 2020-06-12)
liborangepower/src/gmp_stuff/ (0, 2020-06-12)
liborangepower/src/gmp_stuff/gmp_stuff.cpp (618, 2020-06-12)
liborangepower/src/gmp_stuff/gmp_stuff.hpp (691, 2020-06-12)
liborangepower/src/json_stuff/ (0, 2020-06-12)
liborangepower/src/json_stuff/json_stuff.cpp (4133, 2020-06-12)
liborangepower/src/json_stuff/json_stuff.hpp (2428, 2020-06-12)
liborangepower/src/lang/ (0, 2020-06-12)
liborangepower/src/lang/ast_node_base_class.hpp (2899, 2020-06-12)
liborangepower/src/lang/ast_node_base_class_defines.hpp (2929, 2020-06-12)
liborangepower/src/lang/ast_node_base_class_undefines.hpp (604, 2020-06-12)
liborangepower/src/lang/ast_visitor_base_class.hpp (943, 2020-06-12)
liborangepower/src/lang/file_pos_class.hpp (1845, 2020-06-12)
liborangepower/src/lang/lexer_base_class.hpp (6852, 2020-06-12)
... ...
# fling_hdl
This is a project to create a C++ like hardware description language. It
is being written in C++ and uses a hand-written recursive descent parser.
As such, the grammar for the language is LL(1).
The initial end goal is for the compiler to spit out semi-readable,
behavioral Verilog 2001. This will most likely be used as the main way to
debug the compiler in general. Eventually, support for spitting out some
of the open HDL IRs may be added, such as RTLIL.
The language itself is inspired mainly by C++, Rust, VHDL 2008, and
SystemVerilog. Eventually it may be an object-oriented language should
that be deemed a good idea.
Although not currently on the table, a simulator for the entire language
may be developed at some point.
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