fst-native

所属分类:硬件设计
开发工具:Rust
文件大小:0KB
下载次数:0
上传日期:2023-10-04 18:43:08
上 传 者sh-1993
说明:  GTKWave.中FST波形格式的本机Rust实现。,
(Native Rust implementation of the FST waveform format from GTKWave.,)

文件列表:
Cargo.toml (611, 2023-11-09)
FstDocumentation.md (4717, 2023-11-09)
LICENSE (1522, 2023-11-09)
examples/ (0, 2023-11-09)
examples/vcd2fst.rs (812, 2023-11-09)
fsts/ (0, 2023-11-09)
fsts/VCD_file_with_errors.vcd.fst (1159, 2023-11-09)
fsts/aldec/ (0, 2023-11-09)
fsts/aldec/SPI_Write.vcd.fst (2503, 2023-11-09)
fsts/amaranth/ (0, 2023-11-09)
fsts/amaranth/up_counter.vcd.fst (724, 2023-11-09)
fsts/ghdl/ (0, 2023-11-09)
fsts/ghdl/alu.vcd.fst (1570, 2023-11-09)
fsts/ghdl/idea.vcd.fst (10871, 2023-11-09)
fsts/ghdl/pcpu.vcd.fst (6909, 2023-11-09)
fsts/gtkwave-analyzer/ (0, 2023-11-09)
fsts/gtkwave-analyzer/des.fst (158102, 2023-11-09)
fsts/gtkwave-analyzer/perm_current.vcd.fst (3717, 2023-11-09)
fsts/gtkwave-analyzer/transaction.fst (2912, 2023-11-09)
fsts/icarus/ (0, 2023-11-09)
fsts/icarus/CPU.vcd.fst (13940, 2023-11-09)
fsts/icarus/rv32_soc_TB.vcd.fst (2206, 2023-11-09)
fsts/icarus/test1.vcd.fst (16657, 2023-11-09)
fsts/model-sim/ (0, 2023-11-09)
fsts/model-sim/CPU_Design.msim.vcd.fst (9090, 2023-11-09)
fsts/model-sim/clkdiv2n_tb.vcd.fst (757, 2023-11-09)
fsts/my-hdl/ (0, 2023-11-09)
fsts/my-hdl/Simple_Memory.vcd.fst (2927, 2023-11-09)
fsts/my-hdl/sigmoid_tb.vcd.fst (2094, 2023-11-09)
fsts/my-hdl/top.vcd.fst (3494, 2023-11-09)
fsts/ncsim/ (0, 2023-11-09)
fsts/ncsim/ffdiv_32bit_tb.vcd.fst (15324, 2023-11-09)
fsts/quartus/ (0, 2023-11-09)
fsts/quartus/mipsHardware.vcd.fst (5479, 2023-11-09)
fsts/quartus/wave_registradores.vcd.fst (763, 2023-11-09)
fsts/questa-sim/ (0, 2023-11-09)
... ...

# FST Documentation Available documentation: - The [source code](https://github.com/gtkwave/gtkwave/tree/e1c01753bc5db9f7b42e41b9bde651a375ec5eba/gtkwave4/src/helpers/fst) of GTKWave. - The [documentation](https://gtkwave.sourceforge.net/gtkwave.pdf) of GTKWave. - An [unofficial specification](https://blog.timhutt.co.uk/fst_spec/) for FST format. ## FST API-Usage Study ### Verilator Verilator uses the `fstWriter` API from [`include/verilated_fst_c.cpp`](https://github.com/verilator/verilator/blob/bd4eede6b47bc894f73ba6151f2ffe63db8feb3d/include/verilated_fst_c.cpp) **Waveform** - `fstWriterEmitValueChange` - `fstWriterEmitTimeChange` - `fstWriterFlushContext` **Header / Meta-Data** - `fstWriterSetTimescaleFromString` - `fstWriterSetPackType(..., FST_WR_PT_LZ4)` - `fstWriterSetParallelMode(..., 1)` (_optional_) **Hierarchy** - `fstWriterCreateVar` - `fstWriterSetScope` - `fstWriterSetUpscope` - `fstWriterCreateEnumTable` - `fstWriterEmitEnumTableRef` **Open / Close** - `fstWriterClose` - `fstWriterCreate` #### Variable Types / Direction Information from [`verilator/src/V3EmitCImp.cpp`](https://github.com/verilator/verilator/blob/bd4eede6b47bc894f73ba6151f2ffe63db8feb3d/src/V3EmitCImp.cpp#L674) **Types** - `FST_VT_VCD_REAL_PARAMETER` - `FST_VT_VCD_REAL` - `FST_VT_VCD_PARAMETER` - `FST_VT_VCD_SUPPLY0` - `FST_VT_VCD_SUPPLY1` - `FST_VT_VCD_TRI0` - `FST_VT_VCD_TRI1` - `FST_VT_VCD_TRI` - `FST_VT_VCD_WIRE` - `FST_VT_VCD_INTEGER` - `FST_VT_SV_BIT` - `FST_VT_SV_LOGIC` - `FST_VT_SV_INT` - `FST_VT_SV_SHORTINT` - `FST_VT_SV_LONGINT` - `FST_VT_SV_BYTE` - `FST_VT_VCD_EVENT` **Direction** - `FST_VD_INOUT` - `FST_VD_OUTPUT` - `FST_VD_INPUT` - `FST_VD_IMPLICIT` ### iVerilog iVerilog uses the `fstWriter` API from [`vpi/sys_fst.c`](https://github.com/steveicarus/iverilog/blob/c498d53d0d6565ec607e5cc472c1d58f58810d52/vpi/sys_fst.c) **Waveform** - `fstWriterEmitValueChange` - `fstWriterEmitTimeChange` - `fstWriterEmitDumpActive` for `$dumpon` and `$dumpoff` - `fstWriterFlushContext` - `fstWriterGetDumpSizeLimitReached` - `fstWriterSetDumpSizeLimit` **Header / Meta-Data** - `fstWriterSetDate` - `fstWriterSetVersion` - `fstWriterSetTimescaleFromString` - `fstWriterSetPackType(..., 1)` (`FST_WR_PT_FASTLZ = 1`) (_optional_) - `fstWriterSetRepackOnClose(..., 1)` (_optional_) **Hierarchy** - `fstWriterCreateVar` - `fstWriterSetSourceInstantiationStem` - `fstWriterSetSourceStem` - `fstWriterSetScope` - `fstWriterSetUpscope` **Open / Close** - `fstWriterClose` - `fstWriterCreate` ### GHDL GHDL uses the `fstWriter` API from [`src/grt/grt-fst.adb`](https://github.com/ghdl/ghdl/blob/b67ace3f4553e5072fb51d1de637e483cf56342a/src/grt/grt-fst.adb) **Waveform** - `fstWriterEmitValueChange` - `fstWriterEmitVariableLengthValueChange` - `fstWriterEmitTimeChange` **Header / Meta-Data** - `fstWriterSetVersion` - `fstWriterSetTimescale` - `fstWriterSetPackType(..., FST_WR_PT_LZ4)` - `fstWriterSetRepackOnClose(..., 1)` - `fstWriterSetFileType(..., FST_FT_VHDL)` - `fstWriterSetParallelMode(..., 0)` **Hierarchy** - `fstWriterCreateVar2` - `fstWriterSetSourceInstantiationStem` - `fstWriterSetSourceStem` - `fstWriterSetScope` - `fstWriterSetUpscope` **Open / Close** - `fstWriterClose` - `fstWriterCreate` ### Yosys Yosys uses the `fstWriter` API from [`passes/sat/sim.cc`](https://github.com/YosysHQ/yosys/blob/417871e8319dbfbc27dabf0512c4dbd9fb9bf07d/passes/sat/sim.cc) **Waveform** - `fstWriterEmitValueChange` - `fstWriterEmitTimeChange` **Header / Meta-Data** - `fstWriterSetDate` - `fstWriterSetVersion` - `fstWriterSetTimescaleFromString` - `fstWriterSetPackType(..., FST_WR_PT_FASTLZ)` - `fstWriterSetRepackOnClose(..., 1)` **Hierarchy** - `fstWriterCreateVar` - `fstWriterSetScope` - `fstWriterSetUpscope` **Open / Close** - `fstWriterClose` - `fstWriterCreate` Yosys uses the `fstReader` API from [`kernel/fstdata.cc`](https://github.com/YosysHQ/yosys/blob/417871e8319dbfbc27dabf0512c4dbd9fb9bf07d/kernel/fstdata.cc) **Waveform** - `fstReaderIterBlocks2` - `fstReaderSetUnlimitedTimeRange` - `fstReaderSetFacProcessMaskAll` **Header / Meta-Data** - `fstReaderGetTimescale` - `fstReaderGetStartTime` - `fstReaderGetEndTime` **Hierarchy** - `fstReaderIterateHier` - `fstReaderPushScope` - `fstReaderPopScope` **Open / Close** - `fstReaderOpen` - `fstReaderClose` ### Others - [`nvc` VHDL Compiler and Simulator](https://github.com/kasi09/nvc) - [SCViewer (waveform viewer for Eclipse)](https://github.com/Minres/SCViewer) - [SystemC-Components](https://github.com/uzleosharif/SystemC-Components/blob/5b65d825766dd2e5359230b0451a23edaeba8d29/src/sysc/scc/fst_trace.cpp#L148) - [Tachyon-DA CVC Verilog Simulator](https://github.com/cambridgehackers/open-src-cvc)

近期下载者

相关文件


收藏者