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Traffic-Light-Controller

所属分类：交通/航空行业
开发工具：VHDL
文件大小：0KB
下载次数：0
上传日期：2023-10-06 20:11:18
上传者：sh-1993

说明：本项目的主要目标是使用VHDL编程设计一种组合锁状态机。在本设计中，我们遵循了一些原则...，
(The main aim in this project is to design a combination lock state machine design using VHDL programming. In this design we follow some procedure to execute the program like compilation, stimulation and execution of the waveform, which results the combinational lock machine it is also an example of a mealy machine.)

文件列表:

imgs/ (0, 2023-10-06)
imgs/ARBITER_RTL.png (11468, 2023-10-06)
imgs/SIMULATION_1.png (85814, 2023-10-06)
imgs/SIMULATION_2.png (85494, 2023-10-06)
imgs/TRAFFIC_CONTROLLER_RTL.png (77852, 2023-10-06)
src/ (0, 2023-10-06)
src/ARBITER.vhd (1858, 2023-10-06)
src/ARBITER.vhd.bak (1163, 2023-10-06)
src/EE232PROJ.vhd (517, 2023-10-06)
src/EE232PROJ.vhd.bak (2402, 2023-10-06)
src/EE232Project.qpf (1269, 2023-10-06)
src/EE232Project.qsf (2950, 2023-10-06)
src/EE232Project_nativelink_simulation.rpt (996, 2023-10-06)
src/TRAFFIC_CONTROLLER.vhd (2629, 2023-10-06)
src/TRAFFIC_CONTROLLER.vhd.bak (5481, 2023-10-06)
src/TRAFFIC_CONTROLLER_WITH_SENSORS.vhd (3595, 2023-10-06)
src/TRAFFIC_CONTROLLER_WITH_SENSORS.vhd.bak (2498, 2023-10-06)
src/db/ (0, 2023-10-06)
src/db/EE232Project.(0).cnf.cdb (11142, 2023-10-06)
src/db/EE232Project.(0).cnf.hdb (3049, 2023-10-06)
src/db/EE232Project.(1).cnf.cdb (1302, 2023-10-06)
src/db/EE232Project.(1).cnf.hdb (1193, 2023-10-06)
src/db/EE232Project.asm.qmsg (2529, 2023-10-06)
src/db/EE232Project.asm.rdb (1550, 2023-10-06)
src/db/EE232Project.asm_labs.ddb (5306, 2023-10-06)
src/db/EE232Project.atom_map.rvd (9412, 2023-10-06)
src/db/EE232Project.cbx.xml (89, 2023-10-06)
src/db/EE232Project.cmp.bpm (706, 2023-10-06)
src/db/EE232Project.cmp.cdb (26327, 2023-10-06)
src/db/EE232Project.cmp.hdb (13433, 2023-10-06)
src/db/EE232Project.cmp.idb (12142, 2023-10-06)
src/db/EE232Project.cmp.kpt (222, 2023-10-06)
src/db/EE232Project.cmp.logdb (3, 2023-10-06)
src/db/EE232Project.cmp.rdb (17332, 2023-10-06)
src/db/EE232Project.cmp0.ddb (114448, 2023-10-06)
src/db/EE232Project.cmp1.ddb (113021, 2023-10-06)
src/db/EE232Project.cmp2.ddb (46532, 2023-10-06)
src/db/EE232Project.cmp_merge.kpt (227, 2023-10-06)
src/db/EE232Project.db_info (151, 2023-10-06)
... ...

# Traffic_Light_Controller Traffic Light Controller is a VHDL project simulating a real life traffic controller and has various components to ensure it's proper functionality. The heart of the system is a Finite State Machine (FSM) that directs the unit to light the main and side street lights at appropriate times for the specified time intervals. This unit depends on several inputs which are generated outside the system. ### System Overview A set of 4 traffic lights have been designed for a 4-way junction as shown in the figure. Only one green signal will be activated at a time. We give a continuous clock input. This design uses a standard two process finite state machine where one process is used to change states on every clock cycle while the other process is used to combinatorially calculate what the next state should be based on the current inputs and the current state. ### Components Implemented - Finite State Machine (FSM) - Arbiter Circuit (for prioritising the traffic lights) ### Simulation Images

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