文件列表:

ICC-RM_B-2008.09-SP1\common_setup.tcl (4352, 2009-12-03)
ICC-RM_B-2008.09-SP1\ICC-RMsettings.txt (573, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\baseline.tcl (7584, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\commit_dp.tcl (1888, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\create_plangroups_dp.tcl (5702, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\create_va_dp.tcl (2545, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\explore.tcl (7892, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\feasibility_dp.tcl (6923, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\feasibility_on_plangroups_dp.tcl (5856, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\gen_explore_table (930, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\gen_explore_table.pl (17606, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\gui_save_snapshots.tcl (2089, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\pin_assignment_budgeting_dp.tcl (3873, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\prepare_block_dp.tcl (4116, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_dp_scripts\proc_explore.tcl (13460, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\chip_finish_icc.tcl (6768, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\clock_opt_cts_icc.tcl (3596, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\clock_opt_psyn_icc.tcl (3261, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\clock_opt_route_icc.tcl (2936, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\common_cts_settings_icc.tcl (2821, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\common_optimization_settings_icc.tcl (2053, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\common_placement_settings_icc.tcl (1329, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\common_post_cts_timing_settings.tcl (1566, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\common_route_si_settings_icc.tcl (3875, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\init_design_icc.tcl (8937, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\mcmm.scenarios.example (5983, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\mv_pg_connect.tcl (327, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\mv_setup_design.tcl (4631, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\outputs_icc.tcl (2080, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\place_opt_icc.tcl (6342, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\route_icc.tcl (4195, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\route_opt_icc.tcl (4306, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_scripts\signoff_opt_icc.tcl (3788, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_setup.tcl (17340, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_zrt_scripts\chip_finish_icc.tcl (6625, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_zrt_scripts\clock_opt_cts_icc.tcl (3626, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_zrt_scripts\clock_opt_route_icc.tcl (3199, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_zrt_scripts\common_route_si_settings_zrt_icc.tcl (4060, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_zrt_scripts\outputs_icc.tcl (2115, 2009-12-03)
ICC-RM_B-2008.09-SP1\icc_zrt_scripts\route_icc.tcl (4453, 2009-12-03)
... ...

############################################################################ # IC Compiler Reference Methodology # Version: B-2008.09-SP1 (Nov. 10, 2008) # Copyright (C) 2007, 2008 Synopsys All rights reserved. ############################################################################ Features ======== - Provides self-documenting reference methodology scripts for place and route using IC Compiler. - Provides the basic flow from netlist to GDS out - Includes IC Compiler Design Planning Reference Methodology, which allows you to explore different floorplans - Includes parallel flows for multivoltage (MV) and multicorner-multimode (MCMM) - Starting in version A-2007.12-SP1, also includes the Hierarchical Reference Methodology - Includes signoff_opt (optimization using Synopsys' sign-off extraction and timing analysis tool) - Includes DFT Compiler and Power Compiler reference methodologies - Designed to work with the Design Compiler Reference Methodology as the first step Description =========== The IC Compiler Reference Methodology provides you with a set of reference scripts that serve as a recommended guideline for developing IC Compiler scripts. The scripts can be run out of the box, enabling you to get a fully optimized and routed design right away. In addition to the basic flow, which includes IC Compiler Design Planning Reference Methodology and sign-off-driven optimization, there are parallel flows that can be run: - Design-for-test scan chain reordering flow - Leakage and dynamic power optimization flow - Multivoltage flow (including MTCMOS): for both non-UPF and UPF-based flows - Multicorner-multimode (MCMM) flow - All key chip-finishing flow steps - Physical hierarchical flow - Zroute flow Contents ======== The IC Compiler Reference Methodology includes the following files: RMsettings.txt: - Reference methodology option settings selected for generating the scripts. README.ICC-RM.txt: - This file which explains how to set up and run the IC Compiler Reference Methodology scripts. Release_Notes.ICC-RM.txt: - Release notes for the IC Compiler Reference Methodology scripts listing the incremental changes in each new version of the scripts. 2 setup scripts common_setup.tcl: - Includes common design setup variables for Design Compiler and IC Compiler Reference Methodologies icc_setup.tcl: - Specified additional variables used by IC Compiler Reference Methodology only 10 constraint and optimization scripts icc_scripts/init_design_icc.tcl: - Reads the logical netlist and constraints, creates the floorplan (or reads the floorplan via DEF), and generates a zero interconnect timing report. icc_scripts/place_opt_icc.tcl: - Runs placement and placement-based optimization. icc_scripts/clock_opt_cts_icc.tcl: - Runs clock tree synthesis (CTS) and optimization. icc_scripts/clock_opt_psyn_icc.tcl: - Runs post-CTS optimization. icc_scripts/clock_opt_route_icc.tcl: Routes the clocks with the specified nondefault routing rules. icc_scripts/route_icc.tcl: - Runs routing. Crosstalk delta delay is enabled by default. icc_scripts/route_opt_icc.tcl: - Runs postroute optimization. Crosstalk delta delay is enabled by default. icc_scripts/chipfinish_icc.tcl: - Runs several chipfinishing steps, such as timing-driven metal fill, detail route wire spreading to reduce the critical area, antenna fixing. icc_scripts/signoff_opt_icc.tcl: - Runs sign-off-driven optimization, using of Star-RCXT and PrimeTime to create a design that is ready for sign-off. icc_scripts/outputs_icc.tcl: - Creates several output files: Verilog, DEF, SPEF, GDS, others. The floorplanning scripts (flat and hierarchical) are in the icc_dp_scripts directory. The Zroute scripts are in the icc_zrt_scripts directory. To run ====== To run the classic router reference methodology, execute the same command as before : make (-f Makefile) ic To run the Zroute reference methodology, use the new makefile as follows : make -f Makefile_zrt ic

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