UART_verilog
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：365KB
下载次数：91
上传日期：2011-11-21 19:52:41
上 传 者：
lieu_li
说明： 带波特率发生器的FPGA_UART串口通信代码，使用ISE10.1综合应用过，通过计算调整两个参数baud_frequcy,baud_limit可适用于多种波特率下的UART传输
(With a baud rate generator FPGA_UART serial communication code, use ISE10.1 integrated application before, by calculating the adjusted two parameters baud_frequcy, baud_limit applicable to a variety of baud rate, UART)
文件列表:
UART_verilog\baud.v (1073, 2011-11-17)
UART_verilog\rx.v (1947, 2011-11-17)
UART_verilog\top.v (1441, 2011-11-21)
UART_verilog\tx.v (1984, 2011-11-17)
UART_verilog\uart\baudtb.v (1118, 2011-11-18)
UART_verilog\uart\device_usage_statistics.html (28111, 2011-11-18)
UART_verilog\uart\uart.ipf (19847, 2011-11-18)
UART_verilog\uart\uart.ise (212801, 2011-11-18)
UART_verilog\uart\uart.ntrc_log (132, 2011-11-18)
UART_verilog\uart\uart.restore (62130, 2011-11-18)
UART_verilog\uart\uart_loop_top.bgn (5222, 2011-11-18)
UART_verilog\uart\uart_loop_top.bit (97731, 2011-11-18)
UART_verilog\uart\uart_loop_top.bld (961, 2011-11-18)
UART_verilog\uart\uart_loop_top.cmd_log (5191, 2011-11-18)
UART_verilog\uart\uart_loop_top.drc (131, 2011-11-18)
UART_verilog\uart\uart_loop_top.lfp (139, 2011-11-17)
UART_verilog\uart\uart_loop_top.lso (6, 2011-11-17)
UART_verilog\uart\uart_loop_top.ncd (28382, 2011-11-18)
UART_verilog\uart\uart_loop_top.ngc (30699, 2011-11-18)
UART_verilog\uart\uart_loop_top.ngd (44299, 2011-11-18)
UART_verilog\uart\uart_loop_top.ngr (27190, 2011-11-18)
UART_verilog\uart\uart_loop_top.pad (7873, 2011-11-18)
UART_verilog\uart\uart_loop_top.par (5695, 2011-11-18)
UART_verilog\uart\uart_loop_top.pcf (423, 2011-11-18)
UART_verilog\uart\uart_loop_top.prj (99, 2011-11-18)
UART_verilog\uart\uart_loop_top.ptwx (16964, 2011-11-18)
UART_verilog\uart\uart_loop_top.spl (99, 2011-11-17)
UART_verilog\uart\uart_loop_top.stx (0, 2011-11-18)
UART_verilog\uart\uart_loop_top.sym (804, 2011-11-17)
UART_verilog\uart\uart_loop_top.syr (20409, 2011-11-18)
UART_verilog\uart\uart_loop_top.twr (2854, 2011-11-18)
UART_verilog\uart\uart_loop_top.twx (18809, 2011-11-18)
UART_verilog\uart\uart_loop_top.ucf (340, 2011-11-17)
UART_verilog\uart\uart_loop_top.unroutes (153, 2011-11-18)
UART_verilog\uart\uart_loop_top.ut (515, 2011-11-18)
UART_verilog\uart\uart_loop_top.xpi (46, 2011-11-18)
UART_verilog\uart\uart_loop_top.xst (1234, 2011-11-18)
UART_verilog\uart\uart_loop_top_guide.ncd (28382, 2011-11-18)
UART_verilog\uart\uart_loop_top_map.map (2553, 2011-11-18)
UART_verilog\uart\uart_loop_top_map.mrp (5522, 2011-11-18)
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