usb
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:7800KB
下载次数:34
上传日期:2011-12-12 14:51:16
上 传 者:
xuguoking
说明: altera FPGA NIOS架构,实现USB的读写操作
(altera FPGA NIOS)
文件列表:
usb\.sopc_builder\filters.xml (69, 2011-02-11)
usb\.sopc_builder\install.ptf (10926, 2006-09-06)
usb\.sopc_builder\preferences.xml (468, 2011-02-11)
usb\altpll0.bsf (3934, 2006-09-06)
usb\altpll0.ppf (416, 2006-09-06)
usb\altpll0.v (16557, 2006-09-06)
usb\altpll0_bb.v (12637, 2006-09-06)
usb\altpll0_wave0.jpg (84608, 2006-09-06)
usb\altpll0_waveforms.html (746, 2006-09-06)
usb\CPU.bsf (6135, 2006-09-06)
usb\CPU.ptf (79605, 2006-09-07)
usb\CPU.v (309685, 2006-09-06)
usb\cpu_0.ocp (840, 2006-09-06)
usb\cpu_0.v (380672, 2006-09-06)
usb\cpu_0.vo (553119, 2006-09-06)
usb\cpu_0_bht_ram.mif (2392, 2006-09-06)
usb\cpu_0_dc_tag_ram.mif (7257, 2006-09-06)
usb\cpu_0_ic_tag_ram.mif (1881, 2006-09-06)
usb\cpu_0_jtag_debug_module.v (12372, 2006-09-06)
usb\cpu_0_jtag_debug_module_wrapper.v (10530, 2006-09-06)
usb\cpu_0_mult_cell.v (6123, 2006-09-06)
usb\cpu_0_ociram_default_contents.mif (5878, 2006-09-06)
usb\cpu_0_rf_ram_a.mif (600, 2006-09-06)
usb\cpu_0_rf_ram_b.mif (600, 2006-09-06)
usb\cpu_0_test_bench.v (38337, 2006-09-06)
usb\CPU_generation_script (780, 2006-09-06)
usb\CPU_log.txt (6179, 2006-09-06)
usb\CPU_setup_quartus.tcl (166, 2006-09-06)
usb\CPU_sim\atail-f.pl (4283, 2006-09-06)
usb\CPU_sim\cfi_flash_0.dat (209790, 2006-09-07)
usb\CPU_sim\cfi_flash_0.sym (3984, 2006-09-07)
usb\CPU_sim\cfi_flash_0_lane0.dat (181818, 2006-09-07)
usb\CPU_sim\cfi_flash_0_lane1.dat (181818, 2006-09-07)
usb\CPU_sim\cpu_0_bht_ram.dat (773, 2006-09-06)
usb\CPU_sim\cpu_0_bht_ram.hex (3870, 2006-09-06)
usb\CPU_sim\cpu_0_dc_tag_ram.dat (3590, 2006-09-06)
usb\CPU_sim\cpu_0_dc_tag_ram.hex (9758, 2006-09-06)
usb\CPU_sim\cpu_0_ic_tag_ram.dat (1029, 2006-09-06)
usb\CPU_sim\cpu_0_ic_tag_ram.hex (2462, 2006-09-06)
usb\CPU_sim\cpu_0_ociram_default_contents.dat (2378, 2006-09-06)
... ...
Readme - Hello World Software Example
DESCRIPTION:
Simple program that prints "Hello from Nios II"
REQUIREMENTS:
This example will run on the following Nios II designs, targeting the Nios
Stratix & Cyclone development boards:
- Standard
- Full Featured
- Fast
- Low Cost
The memory footprint of this hosted application is ~69 kbytes by default
using the standard reference deisgn.
For a reduced footprint version of this template, and an explanation of how
to reduce the memory footprint for a given application, see the
"small_hello_world" template.
PERIPHERALS USED:
This example exercises the following peripherals:
- STDOUT device (UART or JTAG UART)
SOFTWARE SOURCE FILES:
This example includes the following software source files:
- hello_world.c: Everyone needs a Hello World program, right?
BOARD/HOST REQUIREMENTS:
This example requires only a JTAG connection with a Nios Development board. If
the host communication settings are changed from JTAG UART (default) to use a
conventional UART, a serial cable between board DB-9 connector and the host is
required.
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