bch_verilog
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：3785KB
下载次数：214
上传日期：2011-12-14 16:35:32
上 传 者：
ssshao
说明： bch(255,239)编码算法的verilog实现，综合仿真通过，与matlab仿真的结果一致
(bch(255,239)，using verilog )
文件列表:
bch_code\bch_code.ise (125401, 2011-09-14)
bch_code\bch_code.restore (40990, 2011-09-14)
bch_code\bch_encode.v (537, 2011-07-05)
bch_code\bch_main.bld (930, 2011-07-06)
bch_code\bch_main.cmd_log (7199, 2011-07-12)
bch_code\bch_main.gyd (1638, 2011-07-06)
bch_code\bch_main.jed (71661, 2011-07-06)
bch_code\bch_main.lso (6, 2011-07-05)
bch_code\bch_main.mfd (25887, 2011-07-06)
bch_code\bch_main.nga (125895, 2011-07-06)
bch_code\bch_main.ngc (21280, 2011-07-12)
bch_code\bch_main.ngd (52348, 2011-07-06)
bch_code\bch_main.ngr (30559, 2011-07-12)
bch_code\bch_main.pad (2374, 2011-07-06)
bch_code\bch_main.pnx (1811, 2011-07-06)
bch_code\bch_main.prj (53, 2011-07-12)
bch_code\bch_main.rpt (38256, 2011-07-06)
bch_code\bch_main.spl (110, 2011-07-06)
bch_code\bch_main.stx (0, 2011-07-12)
bch_code\bch_main.sym (991, 2011-07-06)
bch_code\bch_main.syr (9202, 2011-07-12)
bch_code\bch_main.tfi (162, 2011-07-06)
bch_code\bch_main.tim (0, 2011-07-06)
bch_code\bch_main.tspec (17133, 2011-07-06)
bch_code\bch_main.ucf (0, 1980-01-01)
bch_code\bch_main.v (1096, 2011-07-12)
bch_code\bch_main.vm6 (184125, 2011-07-06)
bch_code\bch_main.xml (43224, 2011-07-06)
bch_code\bch_main.xst (593, 2011-07-12)
bch_code\bch_main_build.xml (7673, 2011-07-06)
bch_code\bch_main_ngdbuild.xrpt (971, 2011-07-06)
bch_code\bch_main_pad.csv (2379, 2011-07-06)
bch_code\bch_main_xst.xrpt (3345, 2011-07-12)
bch_code\compxlib.cfg (7135, 2011-07-06)
bch_code\compxlib.log (574579, 2011-07-06)
bch_code\encoder.v (1752, 2011-07-12)
bch_code\encoder.vhd (865, 2011-07-05)
bch_code\modelsim.ini (52874, 2011-07-06)
bch_code\test_bch.fdo (428, 2011-07-12)
bch_code\test_bch.udo (111, 2011-07-06)
... ...
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