multiplexers
所属分类:VHDL/FPGA/Verilog
开发工具:Others
文件大小:4KB
下载次数:13
上传日期:2006-04-21 09:04:48
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changking23
说明: 本人正在学习vhdl语言,买了套开发板,这些是配套光盘里的内容,非常难得,网上找不到的
(I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !)
文件列表:
multiplexers\verilog\MUX_16_1.v (2408, 2000-05-12)
multiplexers\verilog\MUX_2_1.v (884, 2000-05-12)
multiplexers\verilog\MUX_32_1.v (4190, 2000-05-12)
multiplexers\verilog\MUX_4_1.v (953, 2000-05-12)
multiplexers\verilog\MUX_8_1.v (1092, 2000-05-12)
multiplexers\verilog (0, 2006-04-20)
multiplexers (0, 2006-04-20)
README file: Virtex-II Platform FPGA Handbook
=============================================
Date: March, 2001
Verilog code examples are provided to illustrate the Chapter 2 - Design Considerations - of
the Virtex-II Platform FPFA Handbook.
- Verilog Templates:
Verilog templates are available as examples to instantiate primitives.
- Verilog Submodules:
Verilog submodules are low level Verilog code instantiating some primitives.
These submodules can be instantiated in a design and must be synthesized with the design.
The templates and submodules can be found in the following directories corresponding to
each section of the Chapter 2: Design Considerations (Virtex-II Platform FPGA HandBook)
Directory:
------------
- multiplexers: "Designing Large Multiplexers"
Submodules (code example):
MUX_2_1_SUBM
MUX_4_1_SUBM
MUX_8_1_SUBM
MUX_16_1_SUBM
MUX_32_1_SUBM
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