verilog-mac
所属分类：VHDL/FPGA/Verilog
开发工具：Windows_Unix
文件大小：125KB
下载次数：129
上传日期：2012-01-07 16:55:10
上 传 者：
sswk
说明： 这是一个以太网的mac程序，verilog写的，可方正 可实现
(this is a mac implementation using verilog，you can emulate it or implement it directly)
文件列表:
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_clockgen.v (1524, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_cop.v (9792, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_crc.v (3018, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_defines.v (3818, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_fifo.v (2380, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_host.v (1874, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_maccontrol.v (7447, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_macstatus.v (7341, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_memory.v (3092, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_miim.v (11924, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_outputcontrol.v (2282, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_phy.v (39429, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_phy_defines.v (1422, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_random.v (1538, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_receivecontrol.v (10206, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_register.v (612, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_registers.v (21747, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_rxaddrcheck.v (3659, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_rxcounters.v (4199, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_rxethmac.v (8493, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_rxstatem.v (2935, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_shiftreg.v (2579, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_spram_256x32.v (3401, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_top.v (26199, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_transmitcontrol.v (6597, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_txcounters.v (4548, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_txethmac.v (12900, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_txstatem.v (5781, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\eth_wishbone.v (62339, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\tb_cop.v (11102, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\tb_ethernet.v (777001, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\tb_ethernet_with_cop.v (16897, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\tb_eth_defines.v (7523, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\tb_eth_top.v (47914, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\timescale.v (26, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\wb_bus_mon.v (13611, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\wb_master32.v (10610, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\wb_master_behavioral.v (20874, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\wb_model_defines.v (4344, 2005-04-13)
此代码是用Verilog实现的以太网接口\Chapter10 Sample\wb_slave_behavioral.v (9321, 2005-04-13)
... ...
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