uartverilog
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：312KB
下载次数：9
上传日期：2012-02-13 16:08:21
上 传 者：
gyr1985
说明： 有关于CPLD的例程。芯片为MAXII，在quartusII下开发，是一个串口例程。
(On CPLD routine. The chip is MAXII, in quartusII under development, is a serial routines.)
文件列表:
uartverilog\db\logic_util_heursitic.dat (4752, 2009-12-15)
uartverilog\db\my_uart_top.(0).cnf.cdb (1524, 2011-07-05)
uartverilog\db\my_uart_top.(0).cnf.hdb (970, 2011-07-05)
uartverilog\db\my_uart_top.(1).cnf.cdb (2300, 2011-07-05)
uartverilog\db\my_uart_top.(1).cnf.hdb (845, 2011-07-05)
uartverilog\db\my_uart_top.(2).cnf.cdb (4629, 2011-07-05)
uartverilog\db\my_uart_top.(2).cnf.hdb (1157, 2011-07-05)
uartverilog\db\my_uart_top.(3).cnf.cdb (3023, 2011-07-05)
uartverilog\db\my_uart_top.(3).cnf.hdb (1074, 2011-07-05)
uartverilog\db\my_uart_top.ae.hdb (9991, 2011-07-05)
uartverilog\db\my_uart_top.asm.qmsg (2210, 2011-08-12)
uartverilog\db\my_uart_top.asm_labs.ddb (1803, 2011-08-12)
uartverilog\db\my_uart_top.cbx.xml (93, 2011-08-12)
uartverilog\db\my_uart_top.cmp.cdb (26341, 2011-08-12)
uartverilog\db\my_uart_top.cmp.hdb (10292, 2011-08-12)
uartverilog\db\my_uart_top.cmp.kpt (342, 2011-08-12)
uartverilog\db\my_uart_top.cmp.logdb (4, 2011-08-12)
uartverilog\db\my_uart_top.cmp.rdb (15333, 2011-08-12)
uartverilog\db\my_uart_top.cmp.tdb (19860, 2011-08-12)
uartverilog\db\my_uart_top.cmp0.ddb (48718, 2011-08-12)
uartverilog\db\my_uart_top.db_info (137, 2011-07-05)
uartverilog\db\my_uart_top.eco.cdb (161, 2011-08-12)
uartverilog\db\my_uart_top.fit.qmsg (21548, 2011-08-12)
uartverilog\db\my_uart_top.hier_info (5967, 2011-08-12)
uartverilog\db\my_uart_top.hif (2403, 2011-08-12)
uartverilog\db\my_uart_top.lpc.html (1980, 2011-08-12)
uartverilog\db\my_uart_top.lpc.rdb (483, 2011-08-12)
uartverilog\db\my_uart_top.lpc.txt (2130, 2011-08-12)
uartverilog\db\my_uart_top.map.cdb (9118, 2011-08-12)
uartverilog\db\my_uart_top.map.hdb (9847, 2011-08-12)
uartverilog\db\my_uart_top.map.logdb (4, 2011-08-12)
uartverilog\db\my_uart_top.map.qmsg (7741, 2011-08-12)
uartverilog\db\my_uart_top.pre_map.cdb (7731, 2011-08-12)
uartverilog\db\my_uart_top.pre_map.hdb (9915, 2011-08-12)
uartverilog\db\my_uart_top.rpp.qmsg (1835, 2011-07-08)
uartverilog\db\my_uart_top.rtlv.hdb (9883, 2011-08-12)
uartverilog\db\my_uart_top.rtlv_sg.cdb (7712, 2011-08-12)
uartverilog\db\my_uart_top.rtlv_sg_swap.cdb (841, 2011-08-12)
uartverilog\db\my_uart_top.sgate.rvd (7922, 2011-07-08)
uartverilog\db\my_uart_top.sgate_sm.rvd (220, 2011-07-08)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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