Xilinx-modelsim-library
所属分类：其他数据库
开发工具：Others
文件大小：31436KB
下载次数：71
上传日期：2006-05-01 14:51:36
上 传 者：
etao00
说明： Xilinx的modelsim 仿真库！里面有许多库函数，对于ｖｌｏｇ或ｖｈｄｌ编程有很多好的源代码可以剪切！
(Xilinx modelsim simulation library! There are many libraries, vlog or VHDL programming a lot of good source code can shear!)
文件列表:
xilinx (0, 2002-12-18)
xilinx\verilog (0, 2002-12-18)
xilinx\verilog\simprims_ver (0, 2002-12-18)
xilinx\verilog\simprims_ver\_info (23917, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d16 (0, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d16\_primary.vhd (821, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d16\verilog.asm (28822, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d16\_primary.dat (2438, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d2 (0, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d2\_primary.vhd (217, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d2\verilog.asm (5287, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d2\_primary.dat (509, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d3 (0, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d3\_primary.vhd (260, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d3\verilog.asm (6956, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d3\_primary.dat (645, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d32 (0, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d32\_primary.vhd (1509, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d32\verilog.asm (55920, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d32\_primary.dat (4674, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d4 (0, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d4\_primary.vhd (303, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d4\verilog.asm (8625, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d4\_primary.dat (781, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d5 (0, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d5\_primary.vhd (346, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d5\verilog.asm (10294, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d5\_primary.dat (917, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d6 (0, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d6\_primary.vhd (389, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d6\verilog.asm (11963, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d6\_primary.dat (1053, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d7 (0, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d7\_primary.vhd (432, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d7\verilog.asm (13632, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d7\_primary.dat (1189, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d8 (0, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d8\_primary.vhd (475, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d8\verilog.asm (15301, 2002-12-18)
xilinx\verilog\simprims_ver\@x_@a@n@d8\_primary.dat (1325, 2002-12-18)
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