maxII_spi

所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:461KB
下载次数:6
上传日期:2012-03-15 02:24:00
上 传 者xornonop
说明:  MAXII SPI interface with testbench

文件列表:
maxII_spi\an485.pdf (119768, 2012-01-22)
maxII_spi\an485_design_example (0, 2012-03-08)
maxII_spi\an485_design_example\code (0, 2007-11-15)
maxII_spi\an485_design_example\code\SPI_Master.v (5023, 2007-02-08)
maxII_spi\an485_design_example\modelsim (0, 2007-11-20)
maxII_spi\an485_design_example\modelsim\SPI_Master.cr.mti (1105, 2007-11-20)
maxII_spi\an485_design_example\modelsim\SPI_Master.mpf (10100, 2007-11-20)
maxII_spi\an485_design_example\modelsim\SPI_Master.v (5023, 2007-02-08)
maxII_spi\an485_design_example\modelsim\SPI_Master_test.v (10393, 2007-02-10)
maxII_spi\an485_design_example\modelsim\SPI_Master_test.v.bak (10393, 2007-02-08)
maxII_spi\an485_design_example\modelsim\transcript (2236, 2007-11-20)
maxII_spi\an485_design_example\modelsim\vsim.wlf (40960, 2007-11-20)
maxII_spi\an485_design_example\modelsim\wave.bmp (406614, 2007-02-10)
maxII_spi\an485_design_example\modelsim\wave.do (1440, 2007-02-10)
maxII_spi\an485_design_example\modelsim\work (0, 2007-11-15)
maxII_spi\an485_design_example\modelsim\work\@s@p@i_@master (0, 2007-11-15)
maxII_spi\an485_design_example\modelsim\work\@s@p@i_@master\_primary.dat (2997, 2007-02-25)
maxII_spi\an485_design_example\modelsim\work\@s@p@i_@master\_primary.vhd (583, 2007-02-25)
maxII_spi\an485_design_example\modelsim\work\@s@p@i_@master\verilog.psm (34033, 2007-02-25)
maxII_spi\an485_design_example\modelsim\work\@s@p@i_master_test (0, 2007-11-15)
maxII_spi\an485_design_example\modelsim\work\@s@p@i_master_test\_primary.dat (7005, 2007-02-25)
maxII_spi\an485_design_example\modelsim\work\@s@p@i_master_test\_primary.vhd (90, 2007-02-25)
maxII_spi\an485_design_example\modelsim\work\@s@p@i_master_test\verilog.psm (63144, 2007-02-25)
maxII_spi\an485_design_example\modelsim\work\_info (649, 2007-02-25)
maxII_spi\an485_design_example\quartus (0, 2012-03-12)
maxII_spi\an485_design_example\quartus\db (0, 2012-03-09)
maxII_spi\an485_design_example\quartus\db\logic_util_heursitic.dat (4180, 2012-03-09)
maxII_spi\an485_design_example\quartus\db\prev_cmp_SPI_Master.asm.qmsg (2037, 2007-11-16)
maxII_spi\an485_design_example\quartus\db\prev_cmp_SPI_Master.fit.qmsg (48847, 2007-11-16)
maxII_spi\an485_design_example\quartus\db\prev_cmp_SPI_Master.map.qmsg (8839, 2007-11-16)
maxII_spi\an485_design_example\quartus\db\prev_cmp_SPI_Master.tan.qmsg (71582, 2007-11-16)
maxII_spi\an485_design_example\quartus\db\SPI_Master.(0).cnf.cdb (10314, 2012-03-09)
maxII_spi\an485_design_example\quartus\db\SPI_Master.(0).cnf.hdb (2449, 2012-03-09)
maxII_spi\an485_design_example\quartus\db\SPI_Master.amm.cdb (445, 2012-03-09)
maxII_spi\an485_design_example\quartus\db\SPI_Master.asm.qmsg (2264, 2012-03-09)
maxII_spi\an485_design_example\quartus\db\SPI_Master.asm.rdb (1361, 2012-03-09)
maxII_spi\an485_design_example\quartus\db\SPI_Master.asm_labs.ddb (1742, 2012-03-09)
maxII_spi\an485_design_example\quartus\db\SPI_Master.atom.rvd (11513, 2012-03-09)
maxII_spi\an485_design_example\quartus\db\SPI_Master.atom_map.rvd (10541, 2012-03-09)
maxII_spi\an485_design_example\quartus\db\SPI_Master.cbx.xml (92, 2012-03-09)
... ...

This folder contains data for incremental compilation. The compiled_partitions sub-folder contains previous compilation results for each partition. As long as this folder is preserved, incremental compilation results from earlier compiles can be re-used. To perform a clean compilation from source files for all partitions, both the db and incremental_db folder should be removed. The imported_partitions sub-folder contains the last imported QXP for each imported partition. As long as this folder is preserved, imported partitions will be automatically re-imported when the db or incremental_db/compiled_partitions folders are removed.

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