MUl
所属分类：VHDL/FPGA/Verilog
开发工具：QT
文件大小：808KB
下载次数：9
上传日期：2012-03-15 13:14:22
上 传 者：
琴酒
说明： 自己编写的单周期16位乘法器源代码，作为普通51单片机的“协处理器”可以实现普通51的实时音频FFT
(16bit multiplier source code I have written a single cycle, as the ordinary 51 single-chip coprocessor can achieve a common 51 real-time audio FFT)
文件列表:
CPLD MUl (0, 2011-03-11)
CPLD MUl\CSAMUL.v (3033, 2010-01-22)
CPLD MUl\CSAMUL.v.bak (3033, 2010-01-22)
CPLD MUl\MUL.asm.rpt (5433, 2010-01-21)
CPLD MUl\MUL.done (26, 2010-01-21)
CPLD MUl\MUL.dpf (239, 2010-01-21)
CPLD MUl\MUL.fit.rpt (141681, 2010-01-21)
CPLD MUl\MUL.fit.smsg (334, 2010-01-21)
CPLD MUl\MUL.fit.summary (362, 2010-01-21)
CPLD MUl\MUL.flow.rpt (5831, 2010-01-21)
CPLD MUl\MUL.map.rpt (131752, 2010-01-21)
CPLD MUl\MUL.map.summary (353, 2010-01-21)
CPLD MUl\MUL.pin (20449, 2010-01-21)
CPLD MUl\MUL.qpf (906, 2010-01-20)
CPLD MUl\MUL.qsf (1962, 2010-01-22)
CPLD MUl\MUL.qws (530, 2010-01-22)
CPLD MUl\MUL.sim.rpt (63074, 2010-01-21)
CPLD MUl\MUL.tan.rpt (39785, 2010-01-21)
CPLD MUl\MUL.tan.summary (718, 2010-01-21)
CPLD MUl\MUL.v (20856, 2010-01-21)
CPLD MUl\MUL.v.bak (20855, 2010-01-21)
CPLD MUl\MUL.vwf (34105, 2010-01-21)
CPLD MUl\PE.v (141, 2010-01-20)
CPLD MUl\db (0, 2011-03-11)
CPLD MUl\db\MUL.(0).cnf.cdb (20825, 2010-01-21)
CPLD MUl\db\MUL.(0).cnf.hdb (5805, 2010-01-21)
CPLD MUl\db\MUL.(1).cnf.cdb (817, 2010-01-21)
CPLD MUl\db\MUL.(1).cnf.hdb (398, 2010-01-21)
CPLD MUl\db\MUL.asm.qmsg (2097, 2010-01-21)
CPLD MUl\db\MUL.cbx.xml (85, 2010-01-21)
CPLD MUl\db\MUL.cmp.cdb (143847, 2010-01-21)
CPLD MUl\db\MUL.cmp.hdb (13916, 2010-01-21)
CPLD MUl\db\MUL.cmp.logdb (4, 2010-01-21)
CPLD MUl\db\MUL.cmp.rdb (21616, 2010-01-21)
CPLD MUl\db\MUL.cmp.tdb (141014, 2010-01-21)
CPLD MUl\db\MUL.cmp0.ddb (235851, 2010-01-21)
CPLD MUl\db\MUL.db_info (137, 2010-01-20)
CPLD MUl\db\MUL.eco.cdb (161, 2010-01-22)
CPLD MUl\db\MUL.eds_overflow (3, 2010-01-21)
CPLD MUl\db\MUL.fit.qmsg (76103, 2010-01-21)
... ...
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