说明：  为锁相回路或锁相环，用来统一整合时脉讯号，使内存能正确的存取资料。PLL用于振荡器中的反馈技术。 许多电子设备要正常工作，通常需要外部的输入信号与内部的振荡信号同步，利 用锁相环路就可以实现这个目的。
(For phase lock loop or phase lock loop, the unification and the integration of the pulse signal used to when, make memory can correct access material. The technology used in PLL oscillator feedback. Many electronic equipment to be normal work, usually need to external input signal and internal oscillation signal synchronization, with the phase lock loop can achieve this goal.)