cide_c2
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：9372KB
下载次数：8
上传日期：2012-05-17 18:08:40
上 传 者：
jiang_husheng
说明： 以太网芯片dm9000a测试，程序配置了DM9000a，使该芯片完成以太网口的数据发送。
(The Ethernet chips DM9000A test, the program is configured DM9000a, allows the chip to complete the Ethernet port to send data.)
文件列表:
cide_c2\DCMotorA.vhd (3166, 2008-11-13)
cide_c2\DCMotorB.vhd (3166, 2008-11-13)
cide_c2\PLL.bsf (3459, 2008-11-05)
cide_c2\PLL.cmp (928, 2008-11-05)
cide_c2\PLL.ppf (422, 2008-11-05)
cide_c2\PLL.qip (430, 2008-11-05)
cide_c2\PLL.vhd (16349, 2008-11-05)
cide_c2\PLL_wave0.jpg (57285, 2008-11-05)
cide_c2\PLL_waveforms.html (608, 2008-11-05)
cide_c2\RS232.vhd (62864, 2008-11-13)
cide_c2\RS485.vhd (62881, 2008-11-13)
cide_c2\RS485_nRE_DE.vhd (2263, 2008-11-13)
cide_c2\button_pio.vhd (7025, 2008-11-13)
cide_c2\cide_c2.asm.rpt (7879, 2008-11-27)
cide_c2\cide_c2.bdf (62835, 2008-11-13)
cide_c2\cide_c2.done (26, 2012-05-09)
cide_c2\cide_c2.dpf (239, 2008-11-06)
cide_c2\cide_c2.eda.rpt (2659, 2008-11-27)
cide_c2\cide_c2.fit.rpt (583097, 2008-11-27)
cide_c2\cide_c2.fit.smsg (513, 2008-11-27)
cide_c2\cide_c2.fit.summary (618, 2008-11-27)
cide_c2\cide_c2.jdi (11850, 2008-11-27)
cide_c2\cide_c2.map.summary (472, 2012-05-09)
cide_c2\cide_c2.pin (58307, 2008-11-27)
cide_c2\cide_c2.pof (2097339, 2008-11-27)
cide_c2\cide_c2.qpf (912, 2008-09-10)
cide_c2\cide_c2.qsf (11931, 2012-05-09)
cide_c2\cide_c2.qsf.bak (2718, 2008-11-05)
cide_c2\cide_c2.sof (841140, 2008-11-27)
cide_c2\cide_c2.sta.rpt (729548, 2008-09-28)
cide_c2\cide_c2.sta.summary (6437, 2008-09-28)
cide_c2\cide_c2.tan.rpt (967890, 2008-11-27)
cide_c2\cide_c2.tan.summary (4509, 2008-11-27)
cide_c2\cpu.ocp (840, 2008-11-13)
cide_c2\cpu.sdc (3680, 2008-11-13)
cide_c2\cpu.vhd (624416, 2008-11-13)
cide_c2\cpu_ic_tag_ram.mif (1881, 2008-11-13)
cide_c2\cpu_jtag_debug_module_sysclk.vhd (5909, 2008-11-13)
cide_c2\cpu_jtag_debug_module_tck.vhd (9044, 2008-11-13)
cide_c2\cpu_jtag_debug_module_wrapper.vhd (14733, 2008-11-13)
... ...
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