klt1
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：361KB
下载次数：15
上传日期：2012-05-17 18:17:57
上 传 者：
jiang_husheng
说明： klt算法的fpga实现，使用altera公司的开发环境。
(the klt algorithm of the fpga implementation, altera company s development environment.)
文件列表:
klt1\Dou64_to_Float32.v (68182, 2011-06-28)
klt1\Double_to_Float.v (68175, 2011-06-28)
klt1\Fixed_to_Float64.v (301814, 2011-06-28)
klt1\Float_Mul_32_32_32.v (148967, 2011-06-28)
klt1\Float_to_Fixed64.v (180660, 2011-06-28)
klt1\ImgRom0.v (4519, 2011-07-01)
klt1\ImgRom1.v (4519, 2011-06-28)
klt1\Int_Conv_buff.v (5391, 2011-06-28)
klt1\Mem_16K_32b.v (4775, 2011-06-28)
klt1\Mem_off_chip.v (4779, 2011-06-28)
klt1\signedmult.v (65182, 2011-06-28)
klt1\Sqrt_64_32.v (1878734, 2011-06-28)
klt1\Sub_float.v (228066, 2011-06-28)
klt1\Accumulator.vhd (4919, 2011-01-04)
klt1\Adder_float.vhd (4778, 2011-06-28)
klt1\Comparer_float.vhd (4803, 2011-06-28)
klt1\Divider_32_64_32.vhd (4828, 2011-06-28)
klt1\Dou64_to_Float32.vhd (4737, 2011-06-28)
klt1\Double_to_Float.vhd (4727, 2011-06-28)
klt1\DualPortMem.vhd (5560, 2010-10-27)
klt1\Eigenvalue_computing.vhd (11894, 2010-12-11)
klt1\Feature_extract.vhd (18330, 2010-12-11)
klt1\FIFO_Regs.vhd (1992, 2010-11-20)
klt1\FIFO_Regs_16.vhd (2553, 2011-05-12)
klt1\Fixed_to_Float64.vhd (4789, 2011-06-28)
klt1\Float_Mul_32_32_32.vhd (4847, 2011-06-28)
klt1\Float_to_Fixed64.vhd (4790, 2011-06-28)
klt1\GxGy_Pixwise_Process.vhd (6673, 2010-12-05)
klt1\ImgRom0.vhd (4850, 2011-07-01)
klt1\ImgRom1.vhd (4850, 2011-06-28)
klt1\Int_Conv_buff.vhd (5549, 2011-06-28)
klt1\Mem_16K_32b.vhd (5575, 2011-06-28)
klt1\Mem_off_chip.vhd (5585, 2011-06-28)
klt1\MotionTracker.vhd (69589, 2011-06-29)
klt1\MotionTrackerTest.vhd (51403, 2011-07-01)
klt1\Multiplier32_32_64.vhd (4283, 2010-10-19)
klt1\Multiplier_32bit.vhd (4325, 2010-08-31)
klt1\OneD_Conv_Operator_32b.vhd (9532, 2010-11-20)
klt1\OneD_Convolver.vhd (20840, 2011-04-03)
klt1\RegionMaxSelect.vhd (12717, 2011-06-30)
... ...
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