clock
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：392KB
下载次数：6
上传日期：2012-05-17 21:35:56
上 传 者：
vocako
说明： 用verilog编写的闹钟程序，含闹钟设置，计时，校时模块。
(With verilog write alarm clock program, including alarm, timing, when the module.)
文件列表:
clock (0, 2012-04-20)
clock\clock.asm.rpt (6760, 2012-04-20)
clock\clock.done (26, 2012-04-20)
clock\clock.fit.eqn (17590, 2012-04-20)
clock\clock.fit.rpt (146373, 2012-04-20)
clock\clock.fit.summary (519, 2012-04-20)
clock\clock.fld (45, 2012-04-20)
clock\clock.flow.rpt (3976, 2012-04-20)
clock\clock.map.eqn (13224, 2012-04-20)
clock\clock.map.rpt (32012, 2012-04-20)
clock\clock.map.summary (452, 2012-04-20)
clock\clock.pin (78202, 2012-04-20)
clock\clock.pof (2097339, 2012-04-20)
clock\clock.qpf (941, 2012-04-20)
clock\clock.qsf (1840, 2012-04-20)
clock\clock.qws (1191, 2012-05-05)
clock\clock.sof (841090, 2012-04-20)
clock\clock.tan.rpt (155215, 2012-04-20)
clock\clock.tan.summary (2923, 2012-04-20)
clock\clock.v (9971, 2012-04-20)
clock\clock.vwf (14821, 2012-04-20)
clock\cmp_state.ini (2, 2012-05-05)
clock\db (0, 2012-05-05)
clock\db\clock.(0).cnf.cdb (14572, 2012-04-20)
clock\db\clock.(0).cnf.hdb (3816, 2012-04-20)
clock\db\clock.asm.qmsg (1110, 2012-04-20)
clock\db\clock.asm_labs.ddb (460629, 2012-04-20)
clock\db\clock.cbx.xml (87, 2012-04-20)
clock\db\clock.cmp.cdb (21562, 2012-04-20)
clock\db\clock.cmp.hdb (8080, 2012-04-20)
clock\db\clock.cmp.logdb (4, 2012-04-20)
clock\db\clock.cmp.rdb (30305, 2012-04-20)
clock\db\clock.cmp.tdb (18667, 2012-04-20)
clock\db\clock.cmp0.ddb (66832, 2012-04-20)
clock\db\clock.db_info (136, 2012-04-20)
clock\db\clock.eco.cdb (141, 2012-05-05)
clock\db\clock.fit.qmsg (47161, 2012-04-20)
clock\db\clock.hier_info (2402, 2012-04-20)
clock\db\clock.hif (421, 2012-04-20)
clock\db\clock.map.cdb (6580, 2012-04-20)
... ...
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