urunn_length_s
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：9KB
下载次数：17
上传日期：2012-06-11 19:50:52
上 传 者：
citess
说明： <p>用verilog 开发应用于图像压缩编码中使用行程长度编码(run lengthencoding，RLE)对交流系数(Aa)进行编码。</p>
(<p> With verilog development for image compression using run length encoding (run lengthencoding, RLE) coding to encode the exchange coefficient (Aa). </p>)
文件列表:
urunn_length_s\run length coding\benth\bench.v (3590, 2005-12-18)
urunn_length_s\run length coding\rtl\attic\jpeg_rle2.v (3529, 2005-12-18)
urunn_length_s\run length coding\rtl\jpeg_rle.v (5863, 2005-12-18)
urunn_length_s\run length coding\rtl\jpeg_rle1.v (8949, 2005-12-18)
urunn_length_s\run length coding\rtl\jpeg_rzs.v (6395, 2005-12-18)
urunn_length_s\run length coding\rtl\attic (0, 2006-01-17)
urunn_length_s\run length coding\benth (0, 2006-01-17)
urunn_length_s\run length coding\rtl (0, 2006-01-17)
urunn_length_s\run length coding (0, 2006-01-17)
urunn_length_s (0, 2012-03-12)
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