DDS
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：2856KB
下载次数：25
上传日期：2012-06-30 20:34:41
上 传 者：
dengru
说明： 基于fpga的dds多种信号发生器的代码
(signal generator based on fpga)
文件列表:
DDS_FINISH\adder.bgn (5148, 2012-06-17)
DDS_FINISH\adder.bit (167051, 2012-06-17)
DDS_FINISH\adder.bld (575, 2012-06-17)
DDS_FINISH\adder.cmd_log (690, 2012-06-17)
DDS_FINISH\adder.drc (38, 2012-06-17)
DDS_FINISH\adder.lso (6, 2012-06-17)
DDS_FINISH\adder.mrp (10716, 2012-06-17)
DDS_FINISH\adder.ncd (7870, 2012-06-17)
DDS_FINISH\adder.ngc (11843, 2012-06-17)
DDS_FINISH\adder.ngd (18355, 2012-06-17)
DDS_FINISH\adder.ngm (41095, 2012-06-17)
DDS_FINISH\adder.pad (8522, 2012-06-17)
DDS_FINISH\adder.par (2699, 2012-06-17)
DDS_FINISH\adder.pcf (97, 2012-06-17)
DDS_FINISH\adder.prj (22, 2012-06-17)
DDS_FINISH\adder.stx (0, 2012-06-17)
DDS_FINISH\adder.syr (5511, 2012-06-17)
DDS_FINISH\adder.twr (10620, 2012-06-17)
DDS_FINISH\adder.twx (34600, 2012-06-17)
DDS_FINISH\adder.ut (518, 2012-06-17)
DDS_FINISH\adder.vhdl (552, 2012-06-17)
DDS_FINISH\adder.vhdl.bak (594, 2012-06-17)
DDS_FINISH\adder.xpi (46, 2012-06-17)
DDS_FINISH\addertsb.ANT (2739, 2012-06-17)
DDS_FINISH\addertsb.fdo (320, 2012-06-17)
DDS_FINISH\addertsb.jhd (48, 2012-06-17)
DDS_FINISH\addertsb.tbw (632, 2012-06-17)
DDS_FINISH\addertsb.tbw_bak0 (2089, 2012-06-17)
DDS_FINISH\addertsb.udo (197, 2012-06-17)
DDS_FINISH\addertsb.xwv (19700, 2012-06-17)
DDS_FINISH\addertsb.xwv_bak (19700, 2012-06-17)
DDS_FINISH\addertsb_bencher.prj (0, 2012-06-17)
DDS_FINISH\adder_map.ncd (4835, 2012-06-17)
DDS_FINISH\adder_map.ngm (41095, 2012-06-17)
DDS_FINISH\adder_pad.csv (8526, 2012-06-17)
DDS_FINISH\adder_pad.txt (31272, 2012-06-17)
DDS_FINISH\asd.ucf (0, 2012-06-17)
DDS_FINISH\asdasdasd.xco (2, 2012-06-17)
DDS_FINISH\asdasdasd.xcp (32, 2012-06-17)
DDS_FINISH\asdasdasdasd.fdo (597, 2012-06-17)
... ...
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