FPGA-SHIYAN
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：44507KB
下载次数：49
上传日期：2012-08-27 10:13:00
上 传 者：
xfxy_008
说明： FPGA教学资源，包括几十个教学实验程序，主芯片为EP2C8Q208C8,SDRAM.
实验指导书 CPLD_mode 9.3Nios_sound_TCP 9.2RunnigLED 10TCP1_test 4.1DECODER_3_8 4.2ENCODER_8_3 4.3Hex7S_s 4.4Hex7S_d 4.5MUX_4 4.6COMPARE 4.7ADDER_4 4.8ADD_SUB_4 5.1D_FF 5.2REG 5.3SHIFT_R 5.4 COUNTER 5.5 FRE_D 5.6SEQDET 6.1vga6.2OLED 6.4PS2_keyboard 6.3PS_mouse 6.5UART-RS232 6.6sd_core 6.7Audio_Interface_TCP 7.1ROM 7.2SRAM 7.3Flash
(FPGA teaching resources, including dozens of teaching experimental procedures, the main chip for EP2C8Q208C8 SDRAM the experimental instructions CPLD_mode 9.3Nios_sound_TCP 9.2RunnigLED 10TCP1_test 4.1DECODER_3_8 4.2ENCODER_8_3 4.3Hex7S_s 4.4Hex7S_d 4.5MUX_4 4.6COMPARE 4.7ADDER_4 4.8ADD_SUB_4 5.1D_FF 5.2REG 5.3SHIFT_R 5.4 COUNTER 5.5 FRE_D 5.6SEQDET 6.1vga6.2OLED 6.4PS2_keyboard 6.3PS_mouse 6.5UART-RS232 6.6sd_core 6.7Audio_Interface_TCP 7.1ROM 7.2SRAM 7.3Flash)
文件列表:
4.1DECODER_3_8\decoder_3_8.qar (11840, 2011-06-04)
4.2ENCODER_8_3\encoder_8_3.qar (11713, 2011-06-04)
4.3Hex7S_s\Hex7S_s.qar (11908, 2011-06-04)
4.4Hex7S_d\Hex7S_d.qar (9303, 2011-06-04)
4.5MUX_4\MUX_4.qar (12045, 2011-06-04)
4.6COMPARE\COMPARE.qar (10728, 2011-06-04)
4.7ADDER_4\ADDER_4.qar (11899, 2011-06-04)
4.8ADD_SUB_4\ADD_SUB_4.qar (11773, 2011-06-04)
5.1D_FF\D_FF.qar (11091, 2011-06-04)
5.2REG\REG.qar (11210, 2011-06-04)
5.3SHIFT_R\SHIFT_R.qar (12250, 2011-06-04)
5.4 COUNTER\COUNTER.qar (12036, 2011-06-04)
5.5 FRE_D\FRE_D.qar (11881, 2011-06-04)
5.6SEQDET\SEQDET.qar (11402, 2011-06-04)
6.1vga\vga.qar (10007, 2011-06-04)
6.2OLED\cyc2_cii51008.pdf (388047, 2009-07-26)
6.2OLED\Driver IC for VGF160128.pdf (1027389, 2005-09-08)
6.2OLED\oled.qar (137204, 2011-06-04)
6.2OLED\QT00-D07049-1H-001_VGF160128B-S001产品规格书_A00.pdf (1075018, 2008-12-04)
6.3PS_mouse\manage_data.qar (15335, 2011-06-04)
6.3PS_mouse\PS2鼠标接口控制器实验演示操作步骤.doc (35840, 2009-08-12)
6.4PS2_keyboard\ps2_keyboard.qar (9259, 2011-06-04)
6.5UART-RS232\UART.qar (705919, 2011-06-04)
6.6sd_core\sd_core.qar (218107, 2011-06-04)
6.6sd_core\stp1.stp (58333, 2009-07-19)
6.6sd_core\说明.txt (45, 2009-07-07)
6.7Audio_Interface_TCP\Audio_Interface_TCP.qar (18267, 2011-06-04)
7.1ROM\sinwave.qar (720242, 2011-06-04)
7.2SRAM\sram_ctrl.qar (233568, 2011-06-04)
7.3Flash\test_norflash.qar (268596, 2011-06-04)
7.4FIFO\FIFO.qar (17030, 2011-06-04)
8.1digit_clock\clock.qar (9457, 2011-06-04)
8.2light_LAMP\auto_button.bmp (1592, 2007-07-13)
8.2light_LAMP\congratulations.bmp (8504, 2007-07-13)
8.2light_LAMP\failure.bmp (4280, 2007-07-15)
8.2light_LAMP\light.bmp (12344, 2007-07-13)
8.2light_LAMP\maker.bmp (12344, 2007-07-21)
8.2light_LAMP\mouse_ps2.qar (112179, 2011-06-04)
8.2light_LAMP\name.bmp (5240, 2007-07-13)
8.2light_LAMP\number.bmp (10372, 2007-07-13)
... ...
Readme - Hello World Software Example
DESCRIPTION:
Simple program that prints "Hello from Nios II"
REQUIREMENTS:
This example will run on the following Nios II designs, targeting the Nios
Stratix & Cyclone development boards:
- Standard
- Full Featured
- Fast
- Low Cost
The memory footprint of this hosted application is ~69 kbytes by default
using the standard reference deisgn.
For a reduced footprint version of this template, and an explanation of how
to reduce the memory footprint for a given application, see the
"small_hello_world" template.
PERIPHERALS USED:
This example exercises the following peripherals:
- STDOUT device (UART or JTAG UART)
SOFTWARE SOURCE FILES:
This example includes the following software source files:
- hello_world.c: Everyone needs a Hello World program, right?
BOARD/HOST REQUIREMENTS:
This example requires only a JTAG connection with a Nios Development board. If
the host communication settings are changed from JTAG UART (default) to use a
conventional UART, a serial cable between board DB-9 connector and the host is
required.
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