pheinrich-PIC-framework-b37b42a

所属分类:汇编语言
开发工具:Asm
文件大小:43KB
下载次数:4
上传日期:2012-08-30 23:37:30
上 传 者fjlindl
说明:  pic18fxx2 family framework in asm

文件列表:
pheinrich-PIC-framework-b37b42a (0, 2009-10-31)
pheinrich-PIC-framework-b37b42a\COPYING (17987, 2009-10-31)
pheinrich-PIC-framework-b37b42a\Makefile (2254, 2009-10-31)
pheinrich-PIC-framework-b37b42a\clock.asm (7937, 2009-10-31)
pheinrich-PIC-framework-b37b42a\console.asm (5061, 2009-10-31)
pheinrich-PIC-framework-b37b42a\eeprom.asm (4467, 2009-10-31)
pheinrich-PIC-framework-b37b42a\framework.inc (3716, 2009-10-31)
pheinrich-PIC-framework-b37b42a\m25p.asm (13084, 2009-10-31)
pheinrich-PIC-framework-b37b42a\macros.inc (7184, 2009-10-31)
pheinrich-PIC-framework-b37b42a\math.asm (3186, 2009-10-31)
pheinrich-PIC-framework-b37b42a\max6957.asm (17815, 2009-10-31)
pheinrich-PIC-framework-b37b42a\private.inc (2059, 2009-10-31)
pheinrich-PIC-framework-b37b42a\random.asm (3644, 2009-10-31)
pheinrich-PIC-framework-b37b42a\spi.asm (6774, 2009-10-31)
pheinrich-PIC-framework-b37b42a\usart.asm (17106, 2009-10-31)
pheinrich-PIC-framework-b37b42a\util.asm (4464, 2009-10-31)
pheinrich-PIC-framework-b37b42a\vtable.asm (4987, 2009-10-31)

PIC Framework Copyright (c) 2006,2008 Peter Heinrich This is a catch-all library of various utility routines for the Microchip PIC 18Fxxxx-series of microcontrollers (16-bit), coded in assembler. It was init- ially part of a larger project, but it soon became clear that many useful routines could be refactored into an independent library. Some examples: * a millisecond-resolution wall-clock, with alarm * basic console out via serial TX * EEPROM access routines * a generic wrapper for M25P-type Flash memories * a wrapper for the MAX6957 LED driver and port extender * a basic Galois LFSR random number generator * basic SPI communication routines * USART support routines, including parity calculation/verification * virtual function table support In the interests of expediency, there are a few minor application-specific assumptions (e.g. that SPI uses RA3 as chip select, or that RC1 ought to generate a 1 Hz pulse train tied to the wall-clock, or that the Fosc is 24 MHz); these may be changed at will, of course.

近期下载者

相关文件


收藏者